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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>Incorrect Documentation of GPREGRET</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/45211/incorrect-documentation-of-gpregret</link><description>In the latest version of the v15.3 nRF SDK, the documentation states bit 1 is used as the flag to enter DFU mode. See below: 
 // &amp;lt;q&amp;gt; NRF_BL_DFU_ENTER_METHOD_GPREGRET - Enter DFU mode when bit 1 (0-indexed) is set in the NRF_POWER_GPREGRET register. </description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Mon, 25 Mar 2019 16:43:51 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/45211/incorrect-documentation-of-gpregret" /><item><title>RE: Incorrect Documentation of GPREGRET</title><link>https://devzone.nordicsemi.com/thread/178183?ContentTypeID=1</link><pubDate>Mon, 25 Mar 2019 16:43:51 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:ee1a4053-3956-461d-9c9e-c59831571845</guid><dc:creator>tesc</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;Thank you for pointing out this documentation error. We appreciate that! It is now registered in our internal issue tracker and should be fixed for a future release.&lt;/p&gt;
&lt;p&gt;Regards,&lt;br /&gt;Terje&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>