RE: nRF52-DK debugger causing timing issue

rickychau — Mon, 01 Apr 2019 17:40:59 GMT

[quote userid="2115" url="~/f/nordic-q-a/45402/nrf52-dk-debugger-causing-timing-issue/178672"]Could you try to run the sequence with the external HFCLK running?[/quote]

i confirmed the sequence is running with external HFCLK

RE: nRF52-DK debugger causing timing issue

Håkon Alseth — Wed, 27 Mar 2019 13:08:29 GMT

Hi,

[quote user=""]

When i scope the signal, i realize when i am not running debug, the one wire protocol wave form is "stretched out", meaning for each data pulse, say when running in debug, the signal is 10us wide, and running without the debugger, the signal stretched out 11us wide.

My question is, when the program runs in debug mode, is there any timing setting may have been overrode? Or any other possibility that would cause this to happen?

[/quote]

Could you try to run the sequence with the external HFCLK running? If not, you will be sourced by the internal RC, which can have a high tolerance (up to 6%).

[quote user=""]One thing worth noting is, the one wire library needs a timing in the micro second range, as low as 1 us. i have tested the nRF52832 timer compare can only pick up the best of 5 us interval. This is another question i have as well, what's the timing spec for the timer compare event? (Given the Timer is using 16MHz with 0 prescaler)[/quote]

It can provide an event every 8 MHz (input frequency / 2), but you'll have to use the timer in combination with GPIOTE + PPI, similar to what is done here:

https://github.com/NordicPlayground/nrf51-8-mhz-gpio-clock/blob/master/main.c

Using the CPU to toggle will slow the process down.

Kind regards,

Håkon