nrf52840 + S140 6.1.1 + DFU example IAR + nRFGO

RE: nrf52840 + S140 6.1.1 + DFU example IAR + nRFGO

AndreasF — Fri, 05 Apr 2019 07:57:08 GMT

Hi.

I've looked into that, and it appears that there is a fault in IAR, I receive the same error as well when I try to download and debug with IAR.

I don't get the error if I program with command line or nRF Connect Programmer, and start the debugging session without downloading.

Here, I've programmed with nRF Connect:

And clicked on "Debug without Downloading"

And I did not get the error.

I have reported this internally.

Are you able to do it this way?

Best regards,

Andreas

RE: nrf52840 + S140 6.1.1 + DFU example IAR + nRFGO

Mohammed Z — Thu, 04 Apr 2019 10:14:55 GMT

Another point, when we try to download and debug the bootloader code using IAR on our chip, we get this error:
"Warning: Stack pointer is set to incorrect alignment Stack addr = 0xFFFFFFFF"
This problem does not allow us to debug the code and see where it is stacked

RE: nrf52840 + S140 6.1.1 + DFU example IAR + nRFGO

Mohammed Z — Thu, 04 Apr 2019 10:05:31 GMT

Thanks Andreas for your answer,
we tried to use the nRF Connect programmer to flash the bootloader and see the memory structure; it is correctly configured (like the schema in the documentation).
However, we can not start the DFU mode and see the BLE device.
is there a change to be made in the bootloader code to enable the DFU mode (we do not use button in our chip to start this mode )?

Best regards,

RE: nrf52840 + S140 6.1.1 + DFU example IAR + nRFGO

AndreasF — Thu, 04 Apr 2019 09:12:57 GMT

Hi Francois.

First of all, I recommend that you don't use nRFgoStudio any more, as it is outdated and will not be updated, you should use nRF Connect Programmer instead.

It should not matter which part of the FLASH memory you program first, as long as it does not overlap.

The structure of the FLASH memory is like this:

Here is an example of how memory region looks for the bootloader example found in folder examples\dfu\secure_bootloader\pca10056_ble_debug and the S140 V6.1.1 SoftDevice:

As you can see, the SoftDevice is at the bottom, and the bootloader is at the top of the memory region.

When you say that you can flash the Application and the SoftDevice, but struggle to flash the bootloader, do you still have the Application flashed as well? Maybe it is the Application you flashed previous that occupy some memory?

The examples from the SDK should come preconfigured, so you should not have to do any configurations.

Best regards,

Andreas

RE: nrf52840 + S140 6.1.1 + DFU example IAR + nRFGO

Mohammed Z — Thu, 04 Apr 2019 07:45:42 GMT

I work with Francois.

More details:

When compiling secure_bootloader_ble_s140_pca10056_debug, we get no error message.

However, when trying to flash the hex on the nRF52840 using nRFGo Studio, after flashing SoftDevide S140 6.1.1, we get this error message:

"This hex file has data in softdevice region. Try programming using "Program SoftDevice", or erase all before programming.

Is this related to RAM/ROM configurations?

FYI, IAR linker conf.

.intvec start 0xf1000

Memory regions

ROM 0xf1000 0xfdfff

RAM 0x200057b8 0x2003ffff

CSTACK 2048 HEAP 0

in sdk_config.h

#ifndef NRF_DFU_APP_DATA_AREA_SIZE
#define NRF_DFU_APP_DATA_AREA_SIZE 12288
#endif

in nrf_mbr.h

/** @addtogroup NRF_MBR_DEFINES Defines
* @{ */

/**@brief MBR SVC Base number. */
#define MBR_SVC_BASE (0x18)

/**@brief Page size in words. */
#define MBR_PAGE_SIZE_IN_WORDS (1024)

/** @brief The size that must be reserved for the MBR when a SoftDevice is written to flash.
This is the offset where the first byte of the SoftDevice hex file is written. */
#define MBR_SIZE (0x1000)

/** @brief Location (in the flash memory) of the bootloader address. */
#define MBR_BOOTLOADER_ADDR (0xFF8)

/** @brief Location (in UICR) of the bootloader address. */
#define MBR_UICR_BOOTLOADER_ADDR (&(NRF_UICR->NRFFW[0]))

/** @brief Location (in the flash memory) of the address of the MBR parameter page. */
#define MBR_PARAM_PAGE_ADDR (0xFFC)

/** @brief Location (in UICR) of the address of the MBR parameter page. */
#define MBR_UICR_PARAM_PAGE_ADDR (&(NRF_UICR->NRFFW[1]))

Where 0XFF8 and 0XFFC comes from?

Would changing any of these values would make it work?

RE: nrf52840 + S140 6.1.1 + DFU example IAR + nRFGO

Francois — Wed, 03 Apr 2019 17:57:29 GMT

Just to make things clear, we are talking about the Bootloader DFU example.