Parallel SPIS peripherals without a TX data stream.

RE: Parallel SPIS peripherals without a TX data stream.

Nguyen Hoan Hoang — Tue, 16 Apr 2019 21:20:10 GMT

Is it possible for you to tell us what external ADC chip you are using. It would help to understand the problem.

RE: Parallel SPIS peripherals without a TX data stream.

henryh — Tue, 16 Apr 2019 13:36:30 GMT

The Nordic processor runs at 64 MHz while I am running the SPI (and the ADC's) off a 6.144 MHz clock that is required to meet the signal processing needs of the application.

RE: Parallel SPIS peripherals without a TX data stream.

awneil — Tue, 16 Apr 2019 10:41:39 GMT

The ARM of the Nordic?

RE: Parallel SPIS peripherals without a TX data stream.

Edvin — Tue, 16 Apr 2019 10:39:29 GMT

[quote user="henryh"]The ARM runs at 64MHz[/quote]

What ARM?

RE: Parallel SPIS peripherals without a TX data stream.

henryh — Fri, 12 Apr 2019 13:43:40 GMT

The ARM runs at 64MHz, I am running the SPI peripherals at 6.144 MHz.

RE: Parallel SPIS peripherals without a TX data stream.

Edvin — Fri, 12 Apr 2019 07:51:47 GMT

Hello,

The max speed for the SPI is 8MHz, so I don't think you will get it to work with 64MHz.

I was able to find this in the specification, but we are currently doing some merging on our documentation libraries, so I can't get the link to it. However, here is a screenshot:

It is found under nRF52840->product specification->peripherals->SPIS->Electrical Specification

BR,

Edvin

RE: Parallel SPIS peripherals without a TX data stream.

henryh — Thu, 11 Apr 2019 15:31:20 GMT

Another device controls the enable and clock generation under command from the '840; that device runs at a base frequency that is compatible with my desired sampling rate. The '840 is designed to run off 64 MHz which for a variety of reasons is not able to provide the time base I need for this application.

RE: Parallel SPIS peripherals without a TX data stream.

Edvin — Thu, 11 Apr 2019 15:18:06 GMT

Hello,

What frequency do the ADC's run on?

[quote user="henryh"]both the ADC's and the '840 SPIS are acting as slaves[/quote]

Then who is the master? Or how do you control the SPI CS/SS pins on the ADCs and the nRF?

BR,

Edvin

RE: Parallel SPIS peripherals without a TX data stream.

awneil — Thu, 11 Apr 2019 14:12:02 GMT

OK - now I see.

But not something I've tried.

RE: Parallel SPIS peripherals without a TX data stream.

henryh — Thu, 11 Apr 2019 13:42:06 GMT

I am using 2 external ADC's that have to run at a specific frequency which is related to the SCK input (and thereby locks the entire data collection process to that clock). The '840 cannot generate this frequency so I am using an external clock source and enable logic to control the data collection process. In this application, both the ADC's and the '840 SPIS are acting as slaves since neither generates the clock or enable with each ADC having a separate instance of SPIS. There is no data return to the ADC therefore I would like to eliminate the TX buffer if possible (it is relatively large) and re-purpose the MISO pins. I think the MISO pin can be eliminated using the "NOT USED" definition or simply changing the pin configuration after setting up the SPIS peripheral but its not clear to me if the peripheral will operate without a TX buffer.

RE: Parallel SPIS peripherals without a TX data stream.

awneil — Wed, 10 Apr 2019 22:09:37 GMT

Why do you want 2 SPIS peripherals?

When you say "collect ADC data", that suggests that the ADC(s) is/are external - in which case it/they would usually be the slave(s) ?

Perhaps a diagram would help ... ?

No, 2 peripherals can't share the same pins.