TX buffer full, in two different ways?https://devzone.nordicsemi.com/f/nordic-q-a/4862/tx-buffer-full-in-two-different-waysHi The datasheet for nRF24le1 seems to describe two ways to find out if the TX buffer is full. Register map 07, STATUS, bit 0, TX_FULL Register map 17, FIFO_STATUS, bit 5, TX_FULL Are the two identical?en-USTelligent Community 13Tue, 23 Dec 2014 17:01:35 GMTRE: TX buffer full, in two different ways?https://devzone.nordicsemi.com/thread/17185?ContentTypeID=1Tue, 23 Dec 2014 17:01:35 GMT137ad170-7792-4731-bb38-c0d22fbe4515:fc6d916d-1e38-4197-b7ea-26735edf0eedStian R&#248;ed Hafskjold<p>They are identical. The STATUS register is shifted out parallel to the command word on MOSI.</p><div style="clear:both;"></div>