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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>TWI Max Drive (Sink) Current</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/50040/twi-max-drive-sink-current</link><description>In &amp;quot; nRF51 Series Reference Manual &amp;quot;, in TWI chapter, it is mentioned to configure the GPIO pins with drive strength S0D1, to secure correct signal levels on the pins used by the TWI master when the system is in OFF mode, and when the TWI master is disabled</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Tue, 13 Aug 2019 08:44:20 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/50040/twi-max-drive-sink-current" /><item><title>RE: TWI Max Drive (Sink) Current</title><link>https://devzone.nordicsemi.com/thread/203763?ContentTypeID=1</link><pubDate>Tue, 13 Aug 2019 08:44:20 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:329ebf2e-8bfa-4d1a-8309-6d3b8f663091</guid><dc:creator>J&amp;#248;rgen Holmefjord</dc:creator><description>[quote user="bob.roozen"]To be sure, we can configure the pins as H0D1&amp;nbsp;&lt;span&gt;when TWI is enabled to get the 5mA&amp;nbsp;sink current for TWI and SDA, right?&lt;/span&gt;[/quote]
&lt;p&gt;Yes, the drive and pull&amp;nbsp;settings should still be configurable when pins are used for TWI peripheral.&amp;nbsp;&lt;/p&gt;
[quote user="bob.roozen"]When TWI is disabled or system in OFF mode, is switching back really necessary&amp;nbsp;to&amp;nbsp;S0D1? Or does&amp;nbsp;H0D1&amp;nbsp;performs as well as&amp;nbsp;S0D1 in TWI disabled or system in OFF.&amp;nbsp;[/quote]
&lt;p&gt;Yes, H0D1 should work as well.&amp;nbsp;&lt;span&gt;S0D1 is the default and is most likely why this is specified in the table.&lt;/span&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: TWI Max Drive (Sink) Current</title><link>https://devzone.nordicsemi.com/thread/200140?ContentTypeID=1</link><pubDate>Tue, 23 Jul 2019 15:28:30 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:11312660-1293-477c-bc8b-455d8381ca90</guid><dc:creator>Bob</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;To be sure, we can configure the pins as H0D1&amp;nbsp;&lt;span&gt;when TWI is enabled to get the 5mA&amp;nbsp;sink current for TWI and SDA, right?&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;When TWI is disabled or system in OFF mode, is switching back really necessary&amp;nbsp;to&amp;nbsp;S0D1? Or does&amp;nbsp;H0D1&amp;nbsp;performs as well as&amp;nbsp;S0D1 in TWI disabled or system in OFF.&amp;nbsp;&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;I can understand the other modes will influence the I2C signal, but I don&amp;#39;t understand why H0 instead of S0 will influence the signal, cause&amp;nbsp;the high level is still disconnected (D1).&amp;nbsp;Is there an explanation for it?&lt;/span&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: TWI Max Drive (Sink) Current</title><link>https://devzone.nordicsemi.com/thread/200120?ContentTypeID=1</link><pubDate>Tue, 23 Jul 2019 14:39:40 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:80267e6b-b373-4f06-93f8-45f03be801d4</guid><dc:creator>J&amp;#248;rgen Holmefjord</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;If nothing else is configured, the pins are standard drive.&lt;/p&gt;
&lt;p&gt;Best regards,&lt;br /&gt;Jørgen&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>