RE: nRF51822 SPI max clock?

Stefan Birnir Sverrisson — Fri, 09 Jan 2015 10:43:19 GMT

The Max speed for SPI master is 4Mbps. The nRF51822 PS is the documentation that should be valid . This is stated in nRF51822 PS v3.1, table 47.

For SPI slave, the max speed is specified to 2Mbps in nRF51822 PS v3.1, table 45. However, with the third revision of the nRF51 hardware should allow 4Mbps SPIS speed. To enable this, the SPI slave must be the only peripheral using a specific RAM block. RAM block layout is described in nRF51822 PS v3.1, table 6.

So the way to do this is to devide the RAM into two sections in Keil -> Options for Target and then assign the spi_slave.c RAM to the IRAM2 section as shown in the following images.

RAM configuration for S110 softdevice, 32kB RAM (e.g. nRF51 QFAC variant) could be:

RAM configuration for S110 softdevice, 16kB RAM (e.g. nRF51 QFAA variant) could be:

Note that this configuration may be different for other softdevices as they use different amount of RAM, see Softdevice Specification (SDS) for the relevant softdevice, chapter about resource usage. Compatibility of different SDS's and softdevices is listed in the nRF51 compatibility matrix.

For the 16kB RAM variant configuration however, only 4kB of RAM remain for the application, and 2kB of that are already used for the softdevice and application stacks, see this thread and this thread. It can be seen in the .map file in the _build folder how much RAM is actually used by the application.