https://devzone.nordicsemi.com/f/nordic-q-a/50570/cmos-or-ttl-logicOn the UART and I2C operations, are the input/output pins configured using CMOS or TTL logic levels? I am trying to design a test to test signal integrity and there are some range differences between the 2 logic levels and I cannot find the infoen-USTelligent Community 13Fri, 02 Aug 2019 12:49:10 GMThttps://devzone.nordicsemi.com/thread/202151?ContentTypeID=1Fri, 02 Aug 2019 12:49:10 GMT137ad170-7792-4731-bb38-c0d22fbe4515:d675787d-d5a8-421c-9997-364481b01485awneil<p>The logic levels are defined - in terms of VDD -&nbsp; in the <strong>Product Specification:</strong></p> <p><a href="https://infocenter.nordicsemi.com/topic/com.nordic.infocenter.nrf52832.ps.v1.1/gpio.html?cp=3_1_0_19_3#unique_1820404704">https://infocenter.nordicsemi.com/topic/com.nordic.infocenter.nrf52832.ps.v1.1/gpio.html?cp=3_1_0_19_3#unique_1820404704</a></p><div style="clear:both;"></div>