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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>nRF52832 can nRESET be programmed to any GPIO using PSELRESET[0] &amp;amp; PSELRESET[1] registers ?</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/50722/nrf52832-can-nreset-be-programmed-to-any-gpio-using-pselreset-0-pselreset-1-registers</link><description>On the previous nRF51822 project the SWDIO pin could be used for nRESET. 
 The nRF52832 Product Specification and example code program nRESET to P0.21. 
 The Product Spec hints another GPIO may be used by programming the AAAAA bits. But then states the</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Wed, 28 Aug 2019 08:03:01 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/50722/nrf52832-can-nreset-be-programmed-to-any-gpio-using-pselreset-0-pselreset-1-registers" /><item><title>RE: nRF52832 can nRESET be programmed to any GPIO using PSELRESET[0] &amp; PSELRESET[1] registers ?</title><link>https://devzone.nordicsemi.com/thread/206519?ContentTypeID=1</link><pubDate>Wed, 28 Aug 2019 08:03:01 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:a7cb67dc-b19d-4996-b307-d9b520497223</guid><dc:creator>ovrebekk</dc:creator><description>&lt;p&gt;Hi Santosh&lt;/p&gt;
&lt;p&gt;All you have to do to set these registers is to define&amp;nbsp;CONFIG_GPIO_AS_PINRESET in your project settings.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Then the system_nrf52xxx.c file will automatically check if the PSELRESET registers are updated, and set them correctly if they are 0xFFFFFFFF.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Below I added the code from the system_nrf52840.c file for reference:&lt;br /&gt;&lt;pre class="ui-code" data-mode="text"&gt;    /* Configure GPIO pads as pPin Reset pin if Pin Reset capabilities desired. If CONFIG_GPIO_AS_PINRESET is not
      defined, pin reset will not be available. One GPIO (see Product Specification to see which one) will then be
      reserved for PinReset and not available as normal GPIO. */
    #if defined (CONFIG_GPIO_AS_PINRESET)
        if (((NRF_UICR-&amp;gt;PSELRESET[0] &amp;amp; UICR_PSELRESET_CONNECT_Msk) != (UICR_PSELRESET_CONNECT_Connected &amp;lt;&amp;lt; UICR_PSELRESET_CONNECT_Pos)) ||
            ((NRF_UICR-&amp;gt;PSELRESET[1] &amp;amp; UICR_PSELRESET_CONNECT_Msk) != (UICR_PSELRESET_CONNECT_Connected &amp;lt;&amp;lt; UICR_PSELRESET_CONNECT_Pos))){
            NRF_NVMC-&amp;gt;CONFIG = NVMC_CONFIG_WEN_Wen &amp;lt;&amp;lt; NVMC_CONFIG_WEN_Pos;
            while (NRF_NVMC-&amp;gt;READY == NVMC_READY_READY_Busy){}
            NRF_UICR-&amp;gt;PSELRESET[0] = 18;
            while (NRF_NVMC-&amp;gt;READY == NVMC_READY_READY_Busy){}
            NRF_UICR-&amp;gt;PSELRESET[1] = 18;
            while (NRF_NVMC-&amp;gt;READY == NVMC_READY_READY_Busy){}
            NRF_NVMC-&amp;gt;CONFIG = NVMC_CONFIG_WEN_Ren &amp;lt;&amp;lt; NVMC_CONFIG_WEN_Pos;
            while (NRF_NVMC-&amp;gt;READY == NVMC_READY_READY_Busy){}
            NVIC_SystemReset();
        }
    #endif&lt;/pre&gt;&lt;/p&gt;
&lt;p&gt;Best regards&lt;br /&gt;Torbjørn&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: nRF52832 can nRESET be programmed to any GPIO using PSELRESET[0] &amp; PSELRESET[1] registers ?</title><link>https://devzone.nordicsemi.com/thread/206457?ContentTypeID=1</link><pubDate>Tue, 27 Aug 2019 19:57:21 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:b715a1e5-a393-408d-8ba2-88f377adaf92</guid><dc:creator>santosh athuru</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;so when does the PSELRESET0/1 get to a value of 21. is MBR writing to it?&lt;/p&gt;
&lt;p&gt;on an erased part, if I read the PSELRESET0/1 registers, I get 0xFFFFFFFF.&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;Best Regards&lt;/p&gt;
&lt;p&gt;Santosh Athuru&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: nRF52832 can nRESET be programmed to any GPIO using PSELRESET[0] &amp; PSELRESET[1] registers ?</title><link>https://devzone.nordicsemi.com/thread/202864?ContentTypeID=1</link><pubDate>Wed, 07 Aug 2019 13:57:04 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:dc90ef6a-27a8-4f8e-8020-6cd56444701f</guid><dc:creator>ovrebekk</dc:creator><description>&lt;p&gt;Hi Robert&lt;/p&gt;
[quote user=""]Can PSELRESET[0]/[1] be programmed to any P0.n pin or exclusively to P0.21 ?[/quote]
&lt;p&gt;The RESET pin can only be enabled on P0.21.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;I believe we had a plan at some point to make this reconfigurable, but in the end it was decided to limit it to a single pin only.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Best regards&lt;br /&gt;Torbjørn&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>