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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>SPI + GPIOTE + UART</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/51721/spi-gpiote-uart</link><description>Hello Everyone, 
 
 I&amp;#39;m currently developing a SoC and I would like to achieve a correct interaction between the SoC and the Nordic Nrf52832. 
 
 The output of the SoC is a PISO register (Parallel Input to Serial Output). The 8 bits data reach the register</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Wed, 04 Sep 2019 11:06:31 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/51721/spi-gpiote-uart" /><item><title>RE: SPI + GPIOTE + UART</title><link>https://devzone.nordicsemi.com/thread/207895?ContentTypeID=1</link><pubDate>Wed, 04 Sep 2019 11:06:31 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:f6bc194e-0d17-45fb-b62e-5fdc1b63a99d</guid><dc:creator>ovrebekk</dc:creator><description>&lt;p&gt;Hi&lt;/p&gt;
&lt;p&gt;I am a bit confused by your data throughput estimate. Wouldn&amp;#39;t 8-bit every 200kHz correspond to a throughput of 1.6Mps?&lt;/p&gt;
&lt;p&gt;i) Whether the throughput is 1Mbps or 1.6Mbps it is still too much for the UART to handle. The max UART baudrate is 1Mbaud,&amp;nbsp;and at minimum one ninth of that baudrate is lost by having to send a stop bit for every byte.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;It should be possible to make the SPI fire once every 5us, but it is not trivial in master mode. You probably need to use the ArrayList feature to avoid having to set up the RAM buffers from the CPU at every 5us interval.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;ii) It would be considerably easier if the SoC were to operate as the master, sending clock and chip select in addition to the data. Then you could set the nRF52832 in SPI slave mode, and have it buffer data in multi byte sized packets that you can process in bulk at a much slower rate.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;iii) Are you able to double buffer the PISO value?&lt;br /&gt;Then it should be easier to ensure safe handover between the SoC and the nRF.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Best regards&lt;br /&gt;Torbjørn&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>