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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>Resource allocation</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/52186/resource-allocation</link><description>Hi, 
 for my nrf52840 based project, I need to following peripherals : 
 
 2 X SPIM Master 
 2 TWIM Master 
 1X TWIS Slave 
 
 Given the resource sharing constraint, is this configuration even possible? 
 if yes , is there a recommended configuration</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Tue, 17 Sep 2019 12:05:37 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/52186/resource-allocation" /><item><title>RE: Resource allocation</title><link>https://devzone.nordicsemi.com/thread/210109?ContentTypeID=1</link><pubDate>Tue, 17 Sep 2019 12:05:37 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:94ddcf71-75c0-4bca-a0cf-bcb1fcef11a5</guid><dc:creator>haakonsh</dc:creator><description>&lt;p&gt;You can use any peripherals given that they do not share registers in RAM.&lt;br /&gt; Since &lt;span&gt;SPIM0/1&lt;/span&gt;, TWIM0/1, and TWIS0/1 share registers you cannot use them at the same time. You must, therefore, use only one TWIM bus.&amp;nbsp;&lt;br /&gt;&lt;br /&gt;By looking at the base address of an instance, found in the peripheral&amp;#39;s&amp;nbsp;&lt;a title="Registers" href="https://infocenter.nordicsemi.com/topic/ps_nrf52840/twim.html?cp=3_0_0_5_30_6#topic"&gt;Registers&lt;/a&gt;&amp;nbsp;chapter, we can find a solution where two instances does not overlap:&lt;br /&gt;&lt;br /&gt;TWIM0&amp;nbsp;&lt;span&gt;or TWIS0,&amp;nbsp;0x40003000&lt;br /&gt;TWIM1 or TWIS1,&amp;nbsp;0x40004000&lt;br /&gt;SPIM2&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;, 0x40023000&lt;br /&gt;SPIM3&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;, 0x4002F000&lt;br /&gt;&lt;/span&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Resource allocation</title><link>https://devzone.nordicsemi.com/thread/209903?ContentTypeID=1</link><pubDate>Mon, 16 Sep 2019 16:10:53 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:003933a9-fb82-467a-a5d3-7f3495e0ffd6</guid><dc:creator>awneil</dc:creator><description>[quote userid="75383" url="~/f/nordic-q-a/52186/resource-allocation/209900"]What do you mean by &amp;quot;&lt;span&gt;required number of hardware devices&amp;quot; ?&lt;/span&gt;[/quote]
&lt;p&gt;A TWI&amp;nbsp;controller is a physical bit of hardware on the silicon.&lt;/p&gt;
&lt;p&gt;Likewise SPI.&lt;/p&gt;
&lt;p&gt;The&amp;nbsp;nRF52840 (like any other microcontroller) has a finite and fixed number of these&amp;nbsp;&lt;span&gt;physical bits of hardware on the silicon.&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;The &lt;strong&gt;Product Specification&lt;/strong&gt; tells you what the number is.&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;&lt;/span&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Resource allocation</title><link>https://devzone.nordicsemi.com/thread/209900?ContentTypeID=1</link><pubDate>Mon, 16 Sep 2019 15:52:02 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:730356fd-9db2-44d1-8b8b-e375cdf79e13</guid><dc:creator>ran</dc:creator><description>&lt;p&gt;The I2C is going to an FPGA and from there multiplexed.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;What do you mean by &amp;quot;&lt;span&gt;required number of hardware devices&amp;quot; ? We are using nrf52840 chip&amp;nbsp;&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;&lt;/span&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Resource allocation</title><link>https://devzone.nordicsemi.com/thread/209899?ContentTypeID=1</link><pubDate>Mon, 16 Sep 2019 15:49:00 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:497808a6-da21-4149-b35d-ab24e4c90641</guid><dc:creator>awneil</dc:creator><description>&lt;p&gt;I2C isn&amp;#39;t really intended to off-board connections.&lt;/p&gt;
&lt;p&gt;Note that you can get TWI multiplexers &amp;amp; bridges ...&lt;/p&gt;
&lt;p&gt;PRS won&amp;#39;t help if the chip doesn&amp;#39;t have the required number of hardware devices.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Resource allocation</title><link>https://devzone.nordicsemi.com/thread/209894?ContentTypeID=1</link><pubDate>Mon, 16 Sep 2019 15:41:57 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:6de297ab-d5cf-4f99-bae9-7fb5099642c4</guid><dc:creator>ran</dc:creator><description>&lt;p&gt;Thanks.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;I have one TWIM routed to an outside connector and another one to on-board Slave ( RTC \ EEPROM )&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Should I enable PRS module to over-come resource sharing conflict&amp;nbsp; ?&amp;nbsp;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Resource allocation</title><link>https://devzone.nordicsemi.com/thread/209880?ContentTypeID=1</link><pubDate>Mon, 16 Sep 2019 14:41:21 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:8cd9ae24-e62b-4ec4-a436-87688fa5a281</guid><dc:creator>awneil</dc:creator><description>&lt;p&gt;Surely, the &lt;strong&gt;Product Specification&lt;/strong&gt; tells you how many SPI and TWI hardware modules are available?&lt;/p&gt;
[quote userid="75383" url="~/f/nordic-q-a/52186/resource-allocation"]2 TWIM Master[/quote]
&lt;p&gt;Why do you need &lt;strong&gt;two&lt;/strong&gt;?&lt;/p&gt;
&lt;p&gt;The whole point of TWI as a &lt;em&gt;&lt;strong&gt;bus&lt;/strong&gt; &lt;/em&gt;is that it one Master can communicate with multiple Slaves.&lt;/p&gt;
&lt;p&gt;Similarly for SPI although, being less well defined, some peripherals might not play nicely together&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>