high data rate communication with SPI ADC

RE: high data rate communication with SPI ADC

Dopler — Thu, 26 Sep 2019 16:42:23 GMT

thank you

RE: high data rate communication with SPI ADC

Jørgen Holmefjord — Thu, 26 Sep 2019 13:37:59 GMT

If you have a long enough EasyDMA array list, you should never be blocked long enough to fill the whole set of buffers you have set aside for this.

When you update the buffer pointer in the interrupt handler from an END event, there may still be an ongoing transfer that has been started (for instance by short between END and START task, or by GPIOTE/PPI from ADC interrupt), but due to the double buffering support, the ongoing transfer will not be discarded when updating the pointers, you will just get a later END event with information about this ongoing before the new buffers are used.

According to this post, the pointers are actually updated by the EasyDMA, allowing you to read it out to see how much of the available buffers have been utilized.

RE: high data rate communication with SPI ADC

Dopler — Thu, 26 Sep 2019 08:41:54 GMT

How can this be done safely?

RE: high data rate communication with SPI ADC

Jørgen Holmefjord — Thu, 26 Sep 2019 08:39:51 GMT

Resetting the pointer will have to be done in software. There is no mechanism in hardware to reduce the buffer pointer.

RE: high data rate communication with SPI ADC

Dopler — Wed, 25 Sep 2019 14:48:44 GMT

thanks for the answer. Yes, i need external ADC. I read documentation, EasyDMA array list may help me for receive several consecutive samples. I can’t understand yet how to reset EasyDMA pointer to buffer begin? If SPIM interrupt is delayed by SoftDevice, how can I verify that the no new sample receive process started?

[EDIT]In other words, is there a safe way to organize a ring buffer for a several (8 or 16) ADC samples?

RE: high data rate communication with SPI ADC

Jørgen Holmefjord — Wed, 25 Sep 2019 13:38:44 GMT

Hi,

The SAADC peripheral in nRF52 series ICs support EasyDMA for sampling directly to RAM buffer. By using PPI to trigger the samples, this can be done completely without CPU intervention. The SAADC peripheral also supports double buffering, allowing you to process one buffer while sampling is done to another buffer.

[EDIT]: If you are still planning to use an external ADC, the SPIM peripheral also support EasyDMA. The DATA_READY pin from ADC can trigger the SPI transfer task directly using GPIOTE and PPI.

Best regards,
Jørgen