nrf52 Easy DMA and critical section

RE: nrf52 Easy DMA and critical section

Riccardo78 — Thu, 17 Oct 2019 15:53:13 GMT

Hi,

Thanks for the reply.

Kind regards

Riccardo

Riccardo78 — Thu, 17 Oct 2019 15:52:43 GMT

Hi,

thanks for the clarification.

Kind regards

riccardo

Håkon Alseth — Thu, 17 Oct 2019 08:18:12 GMT

Hi,

As already mentioned by Dmitry, the EasyDMA runs independently.

If it generates an interrupt while you are in a critical section, the interrupt will be nested and handled when you exit the critical section.

Kind regards,

Håkon

Dmitry — Wed, 16 Oct 2019 19:00:54 GMT

Hello,

EasyDMA is a bus master and works independently of CPU. Transfer will continue when the critical section is active.