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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>Continuous DAC sine generation using SPIM and a HW counter (combined via PPI)</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/54055/continuous-dac-sine-generation-using-spim-and-a-hw-counter-combined-via-ppi</link><description>Hello everyone, 
 I&amp;#39;m trying to generate a periodical sine signal at the output of a 10 bit DAC without CPU interaction. The DAC uses an SPI interface, thus my idea was to use a hardware counter which is connected to the SPIM module via the PPI functionality</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Wed, 06 Nov 2019 11:40:11 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/54055/continuous-dac-sine-generation-using-spim-and-a-hw-counter-combined-via-ppi" /><item><title>RE: Continuous DAC sine generation using SPIM and a HW counter (combined via PPI)</title><link>https://devzone.nordicsemi.com/thread/218800?ContentTypeID=1</link><pubDate>Wed, 06 Nov 2019 11:40:11 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:3136024a-563c-4acb-b256-b333f4693870</guid><dc:creator>Pjay</dc:creator><description>&lt;p&gt;I found a solution: I have implemented a second hw timer/counter configured as counter similar as in the link above. With the main timer I transmit 2 bytes over SPI (triggered by the CC event via PPI). The counter is connected via PPI with the SPI transfer done address and counts each transfer done event. After N events (where N is configurable) the counter generates an interrupt, and in the interrupt handler I increment the pointer regarding my sine array (look-up table).&lt;br /&gt;I don&amp;#39;t know if this is the best solution as I still need to involve CPU for pointer incrementing, but it is better than per event scheduling (regarding timing robustness).&lt;br /&gt;It was a little tricky with SPI because the CS pin is not toggled automatically by the driver. Here I adapted a solution mentioned here: &lt;a href="https://devzone.nordicsemi.com/f/nordic-q-a/18645/no-slave-select-on-spim-xfer-using-ppi-and-gpiote"&gt;https://devzone.nordicsemi.com/f/nordic-q-a/18645/no-slave-select-on-spim-xfer-using-ppi-and-gpiote&lt;/a&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>