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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>DCDCEN0 value isn&amp;#39;t retained after reset</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/54504/dcdcen0-value-isn-t-retained-after-reset</link><description>We have a custom board based on nRF52840. Programming it through external SEGGER interface (P20) available on nRF52840 DK. 
 Our custom board is designed to use the DC-DC converters. So following changes were made. 
 1. Set REGOUT0 with 1.8V 2. Enable</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Mon, 18 Nov 2019 18:09:17 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/54504/dcdcen0-value-isn-t-retained-after-reset" /><item><title>RE: DCDCEN0 value isn't retained after reset</title><link>https://devzone.nordicsemi.com/thread/220675?ContentTypeID=1</link><pubDate>Mon, 18 Nov 2019 18:09:17 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:fa14af7e-a633-4c1f-b891-bc001e128163</guid><dc:creator>Umamaheswara Rao Lankoti</dc:creator><description>&lt;p&gt;Hi Andreas,&lt;/p&gt;
&lt;p&gt;You are correct. On blank device, both the registers are disabled.&lt;/p&gt;
&lt;p&gt;Looks like the DCDCEN is setting to 1 because of CONFIG_SOC_DCDC_NRF52X is set to y. I have created Kconfig for the custom board as&lt;/p&gt;
&lt;p&gt;&lt;pre class="ui-code" data-mode="text"&gt;config BOARD_ENABLE_DCDC
        bool &amp;quot;Enable DCDC mode&amp;quot;
        select SOC_DCDC_NRF52X
        default y

&lt;/pre&gt;&lt;/p&gt;
&lt;p&gt;With below change, able to see DCDCEN and DCDCEN0 registers are enabled when the application is loaded.&lt;/p&gt;
&lt;p&gt;&lt;pre class="ui-code" data-mode="text"&gt;diff --git a/soc/arm/nordic_nrf/nrf52/soc.c b/soc/arm/nordic_nrf/nrf52/soc.c
index aa00eaf..38b9fbd 100644
--- a/soc/arm/nordic_nrf/nrf52/soc.c
+++ b/soc/arm/nordic_nrf/nrf52/soc.c
@@ -67,6 +67,7 @@ static int nordicsemi_nrf52_init(struct device *arg)
 
 #if defined(CONFIG_SOC_DCDC_NRF52X)
        nrf_power_dcdcen_set(true);
+    nrf_power_dcdcen_vddh_set(true);
 #endif
 
        _ClearFaults();
&lt;/pre&gt;&lt;/p&gt;
&lt;p&gt;Is it&amp;nbsp;good to make such change in soc.c ? If yes, I will create another config and call nrf_power_dcdcen_vddh_set(true) when the config is defined for the board or application.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Note: I am using Zephyr code base.&lt;/p&gt;
&lt;p&gt;thanks,&lt;br /&gt;Uma..&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: DCDCEN0 value isn't retained after reset</title><link>https://devzone.nordicsemi.com/thread/220642?ContentTypeID=1</link><pubDate>Mon, 18 Nov 2019 14:57:59 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:b09f98b5-cd52-4544-a737-40852fae1654</guid><dc:creator>Andreas</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;And you are sure there is no application running on the device that is setting this bit on startup, or something similar to that? I ran your commands on&amp;nbsp;a blank&amp;nbsp;nRF52840, behaviour as specified, both registers are cleared.&lt;/p&gt;
&lt;p&gt;&lt;img src="https://devzone.nordicsemi.com/resized-image/__size/320x240/__key/support-attachments/beef5d1b77644c448dabff31668f3a47-4e4d59edba0c484f8fc490ecd92a45cc/pastedimage1574088979978v1.png" alt=" " /&gt;&lt;/p&gt;
&lt;p&gt;Default values are 0 in both, see the &amp;#39;reset value&amp;#39; description.&lt;/p&gt;
&lt;p&gt;&lt;img src="https://devzone.nordicsemi.com/resized-image/__size/320x240/__key/support-attachments/beef5d1b77644c448dabff31668f3a47-4e4d59edba0c484f8fc490ecd92a45cc/pastedimage1574089069661v2.png" alt=" " /&gt;&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Best regards,&lt;/p&gt;
&lt;p&gt;Andreas&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: DCDCEN0 value isn't retained after reset</title><link>https://devzone.nordicsemi.com/thread/220597?ContentTypeID=1</link><pubDate>Mon, 18 Nov 2019 13:42:46 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:5d61153f-0bca-4a52-a58a-31673e2eb84a</guid><dc:creator>Umamaheswara Rao Lankoti</dc:creator><description>&lt;p&gt;Hi Andreas,&lt;/p&gt;
&lt;p&gt;But DCDCEN register retains the value. Only DCDCEN0 value isn&amp;#39;t retained.&lt;/p&gt;
&lt;p&gt;What are the default values of these registers ?&lt;/p&gt;
&lt;p&gt;thanks,&lt;br /&gt;Uma..&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: DCDCEN0 value isn't retained after reset</title><link>https://devzone.nordicsemi.com/thread/220486?ContentTypeID=1</link><pubDate>Mon, 18 Nov 2019 08:39:02 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:3b10d9eb-2993-497e-984f-484aa7938af3</guid><dc:creator>Andreas</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Neither DCDCEN nor DCDCEN0 are retained registers, meaning they are reset to their reset value when the SoC is reset, no matter the reset source. You need to write to this register again after reset, if you do so early in the application it will behave more or less as if it was not erased.&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;The reference design configurations with DCDC converter does not automatically enable the DCDC converter, it just allows you to do so in your code without bricking the SoC.&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Best regards,&lt;/p&gt;
&lt;p&gt;Andreas&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>