ESD protection for SWD

RE: ESD protection for SWD

AmbystomaLabs — Sun, 01 Jul 2018 00:28:40 GMT

Seems like if you set approtect the device shouldn’t go into swd mode.

But if you have already tried that then next choice would be a large cap that the cmos can still drive for swd programming.

There could also be SIDACTors or some other small zener/ schottky solution that may work.

A big inductance and a cap to form a lowpass network could work and still pass the SWD signal.

I've put all kinds of crazy things on 100base-t connections on products to pass ESD and still had solid Ethernet connections. SWD is so slow it should be trivial to solve it.

RE: ESD protection for SWD

godmode — Sat, 30 Jun 2018 09:19:32 GMT

Check:

devzone.nordicsemi.com/.../detecting-jtag-swdio-swdclk-connection

RE: ESD protection for SWD

wangyong — Wed, 08 Mar 2017 15:29:51 GMT

Is there any way for 51822 knows that system is in debug mode? I have hardware in field which makes me really uncomfortable....

RE: ESD protection for SWD

Locky — Thu, 25 Jun 2015 23:41:03 GMT

Thanks Simon, our jig has a voltage set to 3.3V so we are ok on that side. I've scoped the lines which show a T(rise) =180nsec(max) and T(fall)=200nsec(max). According to the J-Link Lite data sheets the T(rise) and T(fall) timing is <= 20nsec.

However when testing on a PCB without any ESD protection, the T(rise) and T(fall) time is still 48nsec, or double the specification. I think I'll make a support case on this.

RE: ESD protection for SWD

Simon Third — Thu, 25 Jun 2015 21:34:31 GMT

Hi Locky, we use the standard J-Link programmers. Mainly because I found that the J-link Lite programmers give programming issues when the VCC of the design is less than 3V. I would also assume that the line drivers in the full spec J-link are better. Have a look at the lines on the scope and compair with the result after changing to 100pF. You only need the cap on the SWDIO/RESET pin.

RE: ESD protection for SWD

Locky — Thu, 25 Jun 2015 17:56:50 GMT

Simon did you do anything special on your programmer side? Did you apply the 1nF to SWDIO or SWDCLK pin? I found that 1nF on the SWIO line solves our issue as well, however this value doesn't work with our Programming Jig. We built a J-Link lite into our Jig for programming, but even slowing the programming speed down to 125kHz still shows issues with connecting to the target. Perhaps someone from Nordic could chime in as well.

RE: ESD protection for SWD

Simon Third — Mon, 18 May 2015 08:04:24 GMT

I have had similar problems where a 1kV contact discharge into the ground plan caused a reset. This was via the USB connector shell. I first tried a 1nF cap to GND on the pin. This solved the reset problem and programs at 1MHz. I then looked at reducing the cap size. At 100pF it passes at 7kV and mostly at 8kV. Plenty of margin for me, and the programming speed is back up.

RE: ESD protection for SWD

Locky — Wed, 15 Apr 2015 05:23:51 GMT

Cool, thanks for the info bud. I'm still doing some testing on this. Ill post findings here if I find anything relevant. Cheers

RE: ESD protection for SWD

Deimantas — Wed, 15 Apr 2015 05:17:52 GMT

Yes, SWDIO has internal pull up and with 47K connected pull up is stronger - around 11K. Also SWCLK has internal pull down. Resistor on SWLK was proposed in one of threads (couldn't find it right now), but the value was 470R. But i noticed that it affects board programing, and 510R doesn't.

RE: ESD protection for SWD

Locky — Wed, 15 Apr 2015 00:35:09 GMT

Isn't the SWDIO internally pulled up with a 16K making your external 47K redundant? Interesting about the 510R pull down on SWCLK.

I recently testing contact discharge of +/-6KV and noted that a 0.01uF cap on the SWDIO helped the board absorb the discharge without any reset, however this affect the boards ability to program, so it is not a viable solution of Production programming.

RE: ESD protection for SWD

Deimantas — Tue, 14 Apr 2015 05:37:36 GMT

I can also confirm that in some cases even with pins shorted to ground, when ESD applied to nRF51822 SW pins current consumption increases. Now we changed enclosere to full plastic (SWCLK to ground with 510R, and SWDIO to VSS with 47K) and in daily use everything works fine, no reboots or increased current consumption detected.

RE: ESD protection for SWD

Locky — Wed, 08 Apr 2015 20:01:53 GMT

We have seen ESD applied to a plastic enclosure still cause resets to the board inside. This has been seen in rare cases in the field. Our SWD lines are quite short.

RE: ESD protection for SWD

Asbjørn — Mon, 23 Feb 2015 11:44:25 GMT

Yes, as you say, it will make the production for your application more complex. Are you sure that a 900V discharge directly on the SWDCLK pin is something that could potentially happen to you application? Usually the housing or encapsulation will be hit, but not necessary directly on the SWCLK pin itself.

RE: ESD protection for SWD

Deimantas — Wed, 18 Feb 2015 08:03:58 GMT

Now i see that, 0R resistor not always helps. But it reduces the posibility of increased current consumption. 0R resistor isn't best case, because during manufactoring, after device testing, you should solder a resistor. So production becomes more complex.

RE: ESD protection for SWD

Asbjørn — Thu, 12 Feb 2015 08:51:07 GMT

Yes, if you use a 0 Ohm resistor. The idea was to replace that resistor while developing with a capacitor or remove it altogether.

RE: ESD protection for SWD

Locky — Wed, 11 Feb 2015 19:24:08 GMT

This would eliminate the ability to program the chip on-board though, no?

DiamondS: Is this something you are seeing while the product is inside an enclosure?

RE: ESD protection for SWD

Asbjørn — Wed, 11 Feb 2015 16:49:55 GMT

You could tie the pin directly to ground on the final product. During development you could have a different implementation/component that would allow you to program the chip. That would allow you to develop normally and also replace the component to ground if you feel that is necessary for the application.