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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>SDK 15.3.0 Timer Driver aligning timing to signal rising edge</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/55348/sdk-15-3-0-timer-driver-aligning-timing-to-signal-rising-edge</link><description>Hello, 
 SDK 15.3.0 
 s140 
 nrf52840-DK 
 IDE: SES 
 I am attempting to use the LPComp + NRFX TIMER 4 to count the rising edge of a signal, the timer is being used to time when the data is complete so I can calculate an reset for the next amount of data</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Mon, 09 Dec 2019 13:08:07 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/55348/sdk-15-3-0-timer-driver-aligning-timing-to-signal-rising-edge" /><item><title>RE: SDK 15.3.0 Timer Driver aligning timing to signal rising edge</title><link>https://devzone.nordicsemi.com/thread/224444?ContentTypeID=1</link><pubDate>Mon, 09 Dec 2019 13:08:07 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:334108f6-d3e6-4453-a1b0-de692d5d0466</guid><dc:creator>Kenneth</dc:creator><description>[quote user="BEplane"]Can you explain the timing limitations? I did not see much information about that.[/quote]
&lt;p&gt;I believe you are using S140 softdevice, this means that for instance radio interrupts will have the highest priority and can block application interrupts (e.g.&amp;nbsp;lpcomp_event_handler()) for several 88kHz periods, for more info see:&lt;br /&gt;&lt;a href="https://infocenter.nordicsemi.com/topic/sds_s140/SDS/s1xx/processor_avail_interrupt_latency/processor_avail_interrupt_latency.html?cp=4_5_3_0_15"&gt;https://infocenter.nordicsemi.com/topic/sds_s140/SDS/s1xx/processor_avail_interrupt_latency/processor_avail_interrupt_latency.html?cp=4_5_3_0_15&lt;/a&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;In addition you can find the&amp;nbsp;LPCOMP have a typical 5us time for VIN crossing:&lt;br /&gt;&lt;a href="https://infocenter.nordicsemi.com/topic/ps_nrf52840/lpcomp.html?cp=4_0_0_5_11_3_0#unique_642414158"&gt;https://infocenter.nordicsemi.com/topic/ps_nrf52840/lpcomp.html?cp=4_0_0_5_11_3_0#unique_642414158&lt;/a&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;If you are waking from System ON idle (e.g. _WFE()) here you will also have some startup time before interrupt will execute:&lt;br /&gt;&lt;a href="https://infocenter.nordicsemi.com/topic/ps_nrf52840/power.html?cp=4_0_0_4_2_7_2#unique_1094698514"&gt;https://infocenter.nordicsemi.com/topic/ps_nrf52840/power.html?cp=4_0_0_4_2_7_2#unique_1094698514&lt;/a&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Adding the above together you will soon get into trouble counting 88kHz periods by an interrupt. So you need to use PPI one way or the other.&lt;/p&gt;
&lt;p&gt;With my suggestion you would likely need 2 timers, one that is counting pulses, and a second that check the counting frequently to detect when it&amp;#39;s active and not. At least that is my suggestion.&lt;/p&gt;
&lt;p&gt;Best regards,&lt;br /&gt;Kenneth&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SDK 15.3.0 Timer Driver aligning timing to signal rising edge</title><link>https://devzone.nordicsemi.com/thread/224422?ContentTypeID=1</link><pubDate>Mon, 09 Dec 2019 12:32:49 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:45e47cc5-9fe4-4cd3-a4c3-bf60e64fe1bb</guid><dc:creator>BEplane</dc:creator><description>&lt;p&gt;Can you explain the timing limitations? I did not see much information about that.&lt;/p&gt;
&lt;p&gt;Your suggested method will count all pulses, but I do not see how I would determine the end of each pulse train in order to reset count and calculate the needed value.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;To do this the only method I can think of is to have a 50ms timer aligned to the first pulse of the pulse train. When the timer triggers the count is reset.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;So is the code in the original post the correct way to align the timer?&lt;/p&gt;
&lt;p&gt;How long will it take for the timer to start once enabled. Between the first tick and the second is 88kHz so counts could be missed if the start time of the timer is longer.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SDK 15.3.0 Timer Driver aligning timing to signal rising edge</title><link>https://devzone.nordicsemi.com/thread/224403?ContentTypeID=1</link><pubDate>Mon, 09 Dec 2019 11:56:35 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:a090994a-b70d-4652-9fff-928613d576a4</guid><dc:creator>Kenneth</dc:creator><description>&lt;p&gt;I think LPCOMP will be too slow here.&lt;/p&gt;
&lt;p&gt;My suggestion is to look at the \gpiote or \ppi examples in the nRF5 SDK.&lt;/p&gt;
&lt;p&gt;I suggest to setup timer in COUNTER mode, and then connect a PPI channel from the GPIOTE IN event on the pin you want to count, to the COUNTER task of the timer. Then the timer will count all pulses that occurs on the pin.&amp;nbsp;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>