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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>Minimum and maximum frequency generation on nRF51822 GPIO?</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/5649/minimum-and-maximum-frequency-generation-on-nrf51822-gpio</link><description>I&amp;#39;d like to know what is the minimum and maximum frequency I can generate on a GPIO with a 50% duty cycle (+/-10% at the worst case). Which resources should I use for that purpose? Let&amp;#39;s assume a 16 MHz crystal input to the nRF51822. 
 (The application</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Mon, 23 Feb 2015 13:49:43 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/5649/minimum-and-maximum-frequency-generation-on-nrf51822-gpio" /><item><title>RE: Minimum and maximum frequency generation on nRF51822 GPIO?</title><link>https://devzone.nordicsemi.com/thread/19791?ContentTypeID=1</link><pubDate>Mon, 23 Feb 2015 13:49:43 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:79bf6f5a-4d26-436b-a066-91a2a4521337</guid><dc:creator>Stefan Birnir Sverrisson</dc:creator><description>&lt;p&gt;Thank you for the good answer JohnBrown. Here is the link to the &lt;a href="https://github.com/NordicSemiconductor/nrf51-pwm-library"&gt;PWM example on Github&lt;/a&gt;. Creating a clock signal should also be easy with the &lt;a href="http://developer.nordicsemi.com/nRF51_SDK/doc/7.2.0/s110/html/a00023.html"&gt;gpiote_example in the SDK&lt;/a&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Minimum and maximum frequency generation on nRF51822 GPIO?</title><link>https://devzone.nordicsemi.com/thread/19790?ContentTypeID=1</link><pubDate>Thu, 19 Feb 2015 15:39:22 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:05784806-dc00-4cd3-ae6f-7b88b9d65056</guid><dc:creator>JohnBrown</dc:creator><description>&lt;p&gt;I would think that the theoretical maximum frequency would be achieved by toggling the GPIO when the timer counter reaches a count of 1, and clearing the counter at this time.
That would produce a 50% duty cycle clock at 8MHz, if the counter is clocked from the system clock. You need to use a hardware timer/counter, a PPI channel and a GPIOTE task.
Take a look at the PWM example on github for more info.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>