Multiple definition of SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler

RE: Multiple definition of SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler

thomas.l — Wed, 05 Feb 2020 07:31:54 GMT

Thank you, that was a new (and strange) concept to me. Now it's somewhat understandable. This will require some soldering now ..

RE: Multiple definition of SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler

ketiljo — Tue, 04 Feb 2020 14:58:16 GMT

Many of the serial interfaces share resources. This table shows the base address of the various pheripherals: https://infocenter.nordicsemi.com/topic/ps_nrf52840/memory.html#topic

The ones with the same base address share the same resource and can't be used simultaneously. So you have used all SPI instances, there are no free resources for TWI.

RE: Multiple definition of SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler

thomas.l — Tue, 04 Feb 2020 14:52:31 GMT

According to this table https://infocenter.nordicsemi.com/index.jsp?topic=%2Fcom.nordic.infocenter.nrf52832.ps.v1.1%2Fmemory.html&cp=2_2_0_7_3&anchor=topic the SPI0 and TWI0 share the same base address. Does this really mean that I can use either only one of them?