Simultaneous Implementation of buses and UARTS

RE: Simultaneous Implementation of buses and UARTS

Andreas — Thu, 06 Feb 2020 13:07:34 GMT

Hi,

Yes you should try to avoid the 'low drive, low frequency' ones to avoid affecting the RX sensitivity if there is traffic during RX. Other than that any GPIO can be used, see the pin assignments for the default pins.

Best regards,

Andreas

RE: Simultaneous Implementation of buses and UARTS

javierbio — Wed, 05 Feb 2020 19:50:14 GMT

Thanks Turbo for your quick response.

Any pin recommended for QSPI?. Or as stated in other posts pick pins away from radio circutry

Best regards,

RE: Simultaneous Implementation of buses and UARTS

Turbo J — Wed, 05 Feb 2020 19:47:21 GMT

[quote userid="86495" url="~/f/nordic-q-a/57452/simultaneous-implementation-of-buses-and-uarts"]peripherals implemented concurrently[/quote]

I see no problems here.

[quote userid="86495" url="~/f/nordic-q-a/57452/simultaneous-implementation-of-buses-and-uarts"]Is it possible to share pins between the SPI and QSPI [/quote]

You really don't want to do that - QSPI and SPI are different peripherials on the chip, sharing would require tedious pin re-assignments. The NRF52840 has more than enough pins for separate busses.