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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>How to make RTC0 worked in repeated mode?</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/57496/how-to-make-rtc0-worked-in-repeated-mode</link><description>Hello Nordic support, 
 I was referring to the RTC example in nrf52 SDK where an interrupt is triggered on Compare Counter event. In the example, the interrupt is triggered just once , i.e 3 s after boot. I would like to modify the example to trigger</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Sat, 08 Feb 2020 18:30:23 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/57496/how-to-make-rtc0-worked-in-repeated-mode" /><item><title>RE: How to make RTC0 worked in repeated mode?</title><link>https://devzone.nordicsemi.com/thread/233403?ContentTypeID=1</link><pubDate>Sat, 08 Feb 2020 18:30:23 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:1ea18e97-9118-4348-a6d2-ad0223e2ee6a</guid><dc:creator>anusha</dc:creator><description>&lt;p&gt;Thanks for the suggestions. I tried the task overflow approach since this is the interrupt I will be using and it is working.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: How to make RTC0 worked in repeated mode?</title><link>https://devzone.nordicsemi.com/thread/233134?ContentTypeID=1</link><pubDate>Thu, 06 Feb 2020 17:38:20 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:b93ba811-2ebb-4d47-acb9-d8d927c906fa</guid><dc:creator>hmolesworth</dc:creator><description>&lt;p&gt;The counter clear operation on the nRF52832 RTC doesn&amp;#39;t generate a separate interrupt; and there are 2 other options. If this is the only interrupt used on the timer, you can trigger an overflow, which after 16 RTC ticks will behave as a counter clear and generate an interrupt if enabled.&lt;/p&gt;
&lt;p&gt;&lt;pre class="ui-code" data-mode="c_cpp"&gt;// Cane use timer overflow trigger as pseudo clear, overflows 16 ticks later
  pRTC-&amp;gt;TASKS_TRIGOVRFLW;     // Set COUNTER to 0xFFFFF0&lt;/pre&gt;&lt;/p&gt;
&lt;p&gt;If you have more than 1 interrupt in the RTC, then that not may be usable, in which case you can move the CC register forward on each interrupt to the next required value. There are two ways of doing this, read the current counter and add the offset to that or (preferably) add the offset directly to the CC register. The latter option has proved somewhat troublesome on occasion, but worth a try. The former risks losing accuracy as so many cycles are required to read the counter value. The sample code uses direct low-level registers to make clear what is going on; you can translate that the Nordic drivers if preferred.&lt;/p&gt;
&lt;p&gt;&lt;pre class="ui-code" data-mode="c_cpp"&gt;//  Frequency fRTC [kHz] = 32.768 / (PRESCALER + 1 )
//  24-bit counter so overflows from 0xFFFFFF to 0x000000, prescaler is 12-bit range 0-4095
#define RTC_CRYSTAL_FREQUENCY   32768ul // Hz
#define TIMER_PRESCALER             0   // (32768Hz/(PRESCALER+1)) -&amp;gt; 32.768KHz or 30.517us tick when prescaler is 0
#define MSECS_PER_TICK             10   // Slower ticks means less power but also less accuracy, so choose a balance
#define TIMER_TICK  ((RTC_CRYSTAL_FREQUENCY*MSECS_PER_TICK)/1000) // Assumes 30.517 us basic crystal tick but adjusts automatically

void RTC0_IRQHandler(void)
{
   NRF_RTC_Type * pRTC = NRF_RTC0;
   // COUNTER and COMPARE[n] registers are all 24-bit. It seems an intermediate sampled
   // value must be used as pRTC-&amp;gt;CC[1] += N; does not work for some reason, maybe requires
   // so many cycles to read back
   uint32_t CountValue = pRTC-&amp;gt;COUNTER;
#if 0
   // TICK is interrupt every Prescaler overflow (if enabled)
   if (pRTC-&amp;gt;EVENTS_TICK == 1)
   {
      // 32.768kHz for 8-bit overflow with divisor set to 0 (ie /1) is 30.52 uSeconds
      pRTC-&amp;gt;EVENTS_TICK = 0;
   }
   // OVRFLW is interrupt every RTC Counter overflow (if enabled)
   if (pRTC-&amp;gt;EVENTS_OVRFLW == 1)
   {
      // 32.768kHz for 24-bit overflow with divisor set to 0 (ie /1) is 512 seconds
      pRTC-&amp;gt;EVENTS_OVRFLW = 0;
   }
   // Unused, 1,2,3
   if (pRTC-&amp;gt;EVENTS_COMPARE[1] == 1)
   {
      pRTC-&amp;gt;EVENTS_COMPARE[1] = 0;
   }
#endif
   if (pRTC-&amp;gt;EVENTS_COMPARE[0] == 1)
   {
      pRTC-&amp;gt;EVENTS_COMPARE[0] = 0;
      // Data Synchronization Barrier: completes when all explicit memory accesses before
      // last instruction completes to avoid spurious interrupt
      __DSB();
      // TIMER_TICK compare value, will generate next EVENTS_COMPARE[1]
      pRTC-&amp;gt;CC[1] = CountValue + TIMER_TICK;
      // Update generic System Timer or whatever here
      // blahblah
   }
}&lt;/pre&gt;&lt;/p&gt;
&lt;p&gt;The preferred approach:&lt;/p&gt;
&lt;p&gt;&lt;pre class="ui-code" data-mode="c_cpp"&gt;//  Frequency fRTC [kHz] = 32.768 / (PRESCALER + 1 )
//  24-bit counter so overflows from 0xFFFFFF to 0x000000, prescaler is 12-bit range 0-4095
#define RTC_CRYSTAL_FREQUENCY   32768ul // Hz
#define TIMER_PRESCALER             0   // (32768Hz/(PRESCALER+1)) -&amp;gt; 32.768KHz or 30.517us tick when prescaler is 0
#define MSECS_PER_TICK             10   // Slower ticks means less power but also less accuracy, so choose a balance
#define TIMER_TICK  ((RTC_CRYSTAL_FREQUENCY*MSECS_PER_TICK)/1000) // Assumes 30.517 us basic crystal tick but adjusts automatically

void RTC0_IRQHandler(void)
{
   NRF_RTC_Type * pRTC = NRF_RTC0;
   // COUNTER and COMPARE[n] registers are all 24-bit
   if (pRTC-&amp;gt;EVENTS_COMPARE[0] == 1)
   {
      pRTC-&amp;gt;EVENTS_COMPARE[0] = 0;
      // Data Synchronization Barrier: completes when all explicit memory accesses before
      // last instruction completes to avoid spurious interrupt
      __DSB();
       // TIMER_TICK compare value, will generate next EVENTS_COMPARE[1]
      pRTC-&amp;gt;CC[1] += TIMER_TICK;
      // Update generic System Timer or whatever here
      // blahblah
   }
}&lt;/pre&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: How to make RTC0 worked in repeated mode?</title><link>https://devzone.nordicsemi.com/thread/233087?ContentTypeID=1</link><pubDate>Thu, 06 Feb 2020 14:19:44 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:d94535a3-1094-4414-9ff6-a25501a17bb6</guid><dc:creator>anusha</dc:creator><description>&lt;p&gt;Also added the following line in rtc_handler():&lt;/p&gt;
&lt;p&gt;&lt;pre class="ui-code" data-mode="c_cpp"&gt;nrf_drv_rtc_enable(&amp;amp;rtc);&lt;/pre&gt;&lt;/p&gt;
&lt;p&gt;but it still did not help.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: How to make RTC0 worked in repeated mode?</title><link>https://devzone.nordicsemi.com/thread/233084?ContentTypeID=1</link><pubDate>Thu, 06 Feb 2020 14:16:53 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:d93693cb-e967-43ab-bde4-bb4b79b1b15c</guid><dc:creator>haakonsh</dc:creator><description>&lt;p&gt;you need to CLEAR the counter by triggering the&amp;nbsp;&lt;a href="https://infocenter.nordicsemi.com/topic/ps_nrf52840/rtc.html?cp=4_0_0_5_21_9#register.TASKS_CLEAR"&gt;TASKS_CLEAR&lt;/a&gt;, either by calling&amp;nbsp;&lt;a title="nrfx_rtc_counter_clear" href="https://infocenter.nordicsemi.com/topic/sdk_nrf5_v16.0.0/group__nrfx__rtc.html?cp=7_1_6_9_0_29_1_10#ga3efda37f3e9d060bf2958372c979a263"&gt;nrfx_rtc_counter_clear&lt;/a&gt;&amp;nbsp;or by connecting the&amp;nbsp;&lt;a href="https://infocenter.nordicsemi.com/topic/ps_nrf52840/rtc.html?cp=4_0_0_5_21_9#register.EVENTS_COMPARE-0-3"&gt;EVENTS_COMPARE[0]&lt;/a&gt;&amp;nbsp;to the clear task by using a PPI channel.&amp;nbsp;&lt;br /&gt;&lt;br /&gt;If you use the PPI channel you will get free-running timer independent of the CPU.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;Also note that the SoftDevice requires the use of the RTC0 peripheral, RTC1 and 2 is available to the application.&amp;nbsp;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>