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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>Hard Fault Handler</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/57603/hard-fault-handler</link><description>Hi 
 I am trying to implement a lightweight algorithm on nRF52832 Development Kit. When I try to debug the code, it shows &amp;quot;unknown function at address &amp;quot;0x00000A60&amp;quot;. I am attaching the code. 
 
 The error comes in the last lines: 
 &amp;quot; from_bit_interleaving</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Tue, 11 Feb 2020 09:14:37 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/57603/hard-fault-handler" /><item><title>RE: Hard Fault Handler</title><link>https://devzone.nordicsemi.com/thread/233660?ContentTypeID=1</link><pubDate>Tue, 11 Feb 2020 09:14:37 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:03978aef-3b20-4d98-8332-b7565b223caa</guid><dc:creator>Sai Kiran</dc:creator><description>&lt;p&gt;Thanks Bill. Will try doing whatever you told.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Hard Fault Handler</title><link>https://devzone.nordicsemi.com/thread/233609?ContentTypeID=1</link><pubDate>Mon, 10 Feb 2020 18:56:26 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:081e8069-bdc7-496f-b1c2-6a84ef4fa445</guid><dc:creator>wpaul</dc:creator><description>&lt;p&gt;That&amp;#39;s probably not the exact instruction that triggered the fault. More likely that&amp;#39;s the first instruction of the hardfault handler at address 0xa60.&lt;/p&gt;
&lt;p&gt;You are trying to store a 64-bit value to an address pointed to by a char * pointer. You shouldn&amp;#39;t do that. You&amp;#39;re forcing the compiler to do it with casts. But to store a 64-bit quantity to RAM, the compiler will generate an STRD (STorRe Doubleword) instruction. And there is a restriction with the Cortex-M4 processor that LDRD/STRD instructions can&amp;#39;t be misaligned:&lt;/p&gt;
&lt;p&gt;&lt;a href="https://developer.arm.com/docs/dui0553/a/the-cortex-m4-instruction-set/about-the-instruction-descriptions/address-alignment"&gt;https://developer.arm.com/docs/dui0553/a/the-cortex-m4-instruction-set/about-the-instruction-descriptions/address-alignment&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;Note that according to the documentation above, full word loads and stores (LDR/STR) and halfword loads and stores (LDRH/STRH) can handle unaligned accesses, but double-word loads/store can not.&lt;/p&gt;
&lt;p&gt;So if you really need to store the a 64-bit value in your char * array, you have two choices:&lt;/p&gt;
&lt;p&gt;1) Allocate your char * array &amp;quot;c&amp;quot; such that it always starts on an 8-byte aligned address&lt;/p&gt;
&lt;p&gt;2) use a memcpy() to copy the 64-bit value from tmp to the array.&lt;/p&gt;
&lt;p&gt;Oh, also, the reason you&amp;#39;re getting a HardFault instead of a UsageFault is that you probably don&amp;#39;t have a UsageFault handler installed. There is also a SCB-&amp;gt;SHCSR register where you can specifically enable usage fault, bus fault and memory manager faults. If you don&amp;#39;t, all of those things will just trigger as a hard fault.&lt;/p&gt;
&lt;p&gt;-Bill&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Hard Fault Handler</title><link>https://devzone.nordicsemi.com/thread/233574?ContentTypeID=1</link><pubDate>Mon, 10 Feb 2020 14:59:10 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:c7f726cb-165d-48a4-bbb2-10a8fede9dd0</guid><dc:creator>Sai Kiran</dc:creator><description>&lt;p&gt;In the disassembler, here is the exact instruction: ldr r3, [PC, #4]. PC = 0x00000a60. I am not quite clear on what you mean by checking char* pointer arguments. Should I check that the values these pointers hold are word-aligned? I have checked the value of &amp;#39;c&amp;#39; in the code. It stores the address where the resultant cipher text has to be placed. It&amp;#39;s value is 0x20003cd7. So it is not dividable by 4. How do I change that?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Hard Fault Handler</title><link>https://devzone.nordicsemi.com/thread/233469?ContentTypeID=1</link><pubDate>Mon, 10 Feb 2020 09:46:38 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:4b180157-bc9e-4948-8ac1-d3037f757ec6</guid><dc:creator>Turbo J</dc:creator><description>&lt;p&gt;Check disassembly: The compiler probably generated some &amp;quot;LDRD&amp;quot; or &amp;quot;STRD&amp;quot; instructions.&lt;/p&gt;
&lt;p&gt;These will FAULT on non-word alinged addresses. Check all of the char* pointer arguments - if these are not word-aligned (address dividable by 4), this will cause faults.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>