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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>Watchdog not working when in HardFault?</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/5837/watchdog-not-working-when-in-hardfault</link><description>We are configuring the watchdog like this: 
 // Watchdog
NRF_WDT-&amp;gt;CONFIG = (WDT_CONFIG_HALT_Run &amp;lt;&amp;lt; WDT_CONFIG_HALT_Pos) | ( WDT_CONFIG_SLEEP_Run &amp;lt;&amp;lt; WDT_CONFIG_SLEEP_Pos);
NRF_WDT-&amp;gt;CRV = 3*32768; //ca 3 sek. timout
NRF_WDT-&amp;gt;RREN |= WDT_RREN_RR0_Msk;</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Wed, 25 Mar 2015 09:37:06 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/5837/watchdog-not-working-when-in-hardfault" /><item><title>RE: Watchdog not working when in HardFault?</title><link>https://devzone.nordicsemi.com/thread/20392?ContentTypeID=1</link><pubDate>Wed, 25 Mar 2015 09:37:06 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:6b75fb20-137a-4b94-b7ae-eecebe541f6f</guid><dc:creator>Stefan Birnir Sverrisson</dc:creator><description>&lt;p&gt;&lt;a href="https://devzone.nordicsemi.com/question/32705/hardfault-and-watchdog/"&gt;This thread&lt;/a&gt; might also be helpful&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Watchdog not working when in HardFault?</title><link>https://devzone.nordicsemi.com/thread/20391?ContentTypeID=1</link><pubDate>Wed, 25 Mar 2015 02:22:08 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:0fdb6b32-87ec-48cd-a917-539714aeb389</guid><dc:creator>pabigot</dc:creator><description>&lt;p&gt;I&amp;#39;m at a loss to understand how the watchdog could fail the way you describe.  Have you demonstrated this behavior?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Watchdog not working when in HardFault?</title><link>https://devzone.nordicsemi.com/thread/20390?ContentTypeID=1</link><pubDate>Tue, 24 Mar 2015 23:24:29 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:50a64268-19ed-46cc-ac32-fc476356e8a1</guid><dc:creator>RK</dc:creator><description>&lt;p&gt;Depends what the hard fault handler looks like - if it&amp;#39;s the normal one often-copied then it&amp;#39;s just a busy loop which keeps the CPU running, that stops the watchdog counting down so it never fires.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Watchdog not working when in HardFault?</title><link>https://devzone.nordicsemi.com/thread/20389?ContentTypeID=1</link><pubDate>Tue, 24 Mar 2015 18:17:12 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:832ffb6f-aa53-4f51-a461-8efaae847de5</guid><dc:creator>pabigot</dc:creator><description>&lt;p&gt;While this would explain why &lt;code&gt;WDT_IRQHandler&lt;/code&gt; would not be invoked, it does not explain why the watchdog reset would not occur.  In &lt;a href="https://devzone.nordicsemi.com/question/32705/hardfault-and-watchdog"&gt;my own testing&lt;/a&gt; the WDT reliably reset the board even if it was stuck in &lt;code&gt;HardFault_Handler&lt;/code&gt;.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Watchdog not working when in HardFault?</title><link>https://devzone.nordicsemi.com/thread/20387?ContentTypeID=1</link><pubDate>Wed, 04 Mar 2015 13:55:13 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:25961546-6e14-4546-927f-f153494bc4d9</guid><dc:creator>Remco</dc:creator><description>&lt;p&gt;It makes sense for a watchdog interrupt/exception, but not for a reset!
Chapter 19.1.3 of the RM:
A TIMEOUT event will automatically lead to a watchdog reset equivalent to a system reset, see chapter 11 on
page 36. If the watchdog is configured to generate an interrupt on the TIMEOUT event, the watchdog reset
will be postponed with two 32.768 kHz clock cycles after the TIMEOUT event has been generated. Once the
TIMEOUT event has been generated, the impending watchdog reset will always be effectuated.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Watchdog not working when in HardFault?</title><link>https://devzone.nordicsemi.com/thread/20388?ContentTypeID=1</link><pubDate>Tue, 03 Mar 2015 10:11:23 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:89f89e6e-9b41-43cd-bf2f-1f8a83306d4f</guid><dc:creator>TW</dc:creator><description>&lt;p&gt;Coming from an AVR where the watchdog is the almighty ruler, it was odd seeing this. Your answer makes perfect sense, thanks!&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Watchdog not working when in HardFault?</title><link>https://devzone.nordicsemi.com/thread/20386?ContentTypeID=1</link><pubDate>Tue, 03 Mar 2015 10:07:20 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:b36843e9-c8b1-432b-ac66-159089f863fc</guid><dc:creator>RK</dc:creator><description>&lt;p&gt;Yes that&amp;#39;s how ARM Cortex works. Hardfault has a negative exception priority which means it cannot be interrupted except by the two even higher (more negative) exceptions, which are NMI and Reset.&lt;/p&gt;
&lt;p&gt;The WDT is just a normal peripheral with a maximum exception priority of 0, there&amp;#39;s no way that it would be able to interrupt the hardfault handler. That&amp;#39;s not scary, that&amp;#39;s how ARM works.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>