RE: 3 SPI slave sharing the same SCK, MISO and MOSI.

Ted — Fri, 06 Mar 2020 01:28:57 GMT

@Jorgen,

Thanks for your reply. . I'll try it.

RE: 3 SPI slave sharing the same SCK, MISO and MOSI.

Jørgen Holmefjord — Thu, 05 Mar 2020 09:18:57 GMT

Hi,

There is no HW control of SS/CSN pin in the SPI/SPIM peripherals (except in High-speed SPIM3 instance). The driver has support for controlling a single SS pin from the application. If you need to control more SS pins, you need to do that from your application. Set the SS pin to NRF_DRV_SPI_PIN_NOT_USED/NRFX_SPI_PIN_NOT_USED/NRFX_SPIM_PIN_NOT_USED when initializing the SPI driver, configure all SS pins as output using nrf_gpio_cfg_output(pin_number), and control the pins using nrf_gpio_pin_set(pin_number)/rf_gpio_pin_clear(pin_number) before and after each transfer.

Best regards,
Jørgen