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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>GPIOTE/PPI question</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/591/gpiote-ppi-question</link><description>In my design, I have a SPI flash connected to the NRF51822. Additionally, the NRF51822 is connected to a separate microprocessor that needs to be able to access the SPI flash directly to boot. 
 One solution I was hoping could work is to use the GPIOTE</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Thu, 24 Oct 2013 19:40:43 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/591/gpiote-ppi-question" /><item><title>RE: GPIOTE/PPI question</title><link>https://devzone.nordicsemi.com/thread/3073?ContentTypeID=1</link><pubDate>Thu, 24 Oct 2013 19:40:43 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:b8df86df-bf36-492f-a24d-d13f12ad4057</guid><dc:creator>Dan B</dc:creator><description>&lt;p&gt;Yes, the nRF51822 is connected to 2 separate SPI buses, one as a master and one as a slave.  With only 4 GPIOTE&amp;#39;s available, I can&amp;#39;t see how this is possible.  Fortunately, I&amp;#39;ve been able to solve this problem using the latest version of the nRF51822, which has SPI slave HW.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: GPIOTE/PPI question</title><link>https://devzone.nordicsemi.com/thread/3072?ContentTypeID=1</link><pubDate>Mon, 21 Oct 2013 12:06:51 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:4e272624-5e9f-4b98-8153-a169ca2ffb47</guid><dc:creator>Audun</dc:creator><description>&lt;p&gt;Just to clarify: the nRF51822 is connected to 2 separate SPI buses, one bus going to the other MCU, and another bus going to the flash?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>