FPGA connection with 52840 using QSPI interfce issue

RE: FPGA connection with 52840 using QSPI interfce issue

Dmitry — Wed, 01 Apr 2020 09:59:52 GMT

Hi,

it seems you have to implement dummy status register and command 0x05 in your FPGA...

 * @brief Function for writing data to QSPI memory.
 *
 * Write, read, and erase operations check memory device busy state before starting the operation.
 * If the memory is busy, the resulting action depends on the mode in which the write operation is used:
 *  - blocking mode (without handler) - a delay occurs until the last operation runs or
 *    until the operation data is being sent.
 *  - interrupt mode (with handler) - event emission occurs after the last operation
 *    and sending of operation data are finished.

RE: FPGA connection with 52840 using QSPI interfce issue

Simonr — Wed, 01 Apr 2020 08:32:54 GMT

Can you check where this OP code comes from and what it means? That should give us some idea as to what is going on here.

Best regards,

Simon

RE: FPGA connection with 52840 using QSPI interfce issue

peteryou — Wed, 01 Apr 2020 01:25:53 GMT

data defined as below:

QSPI_TEST_DATA_SIZE = 512;

for(int i =0;i < QSPI_TEST_DATA_SIZE;i++)

my _tx_buf[i] = 0x55;

it seemed that the read status reg opcode (0x05) is looping , no data were sent out.

RE: FPGA connection with 52840 using QSPI interfce issue

Simonr — Thu, 26 Mar 2020 12:40:22 GMT

You need to use multiples of 4 bytes when you attempt to write using the function qspi_write function. What is this size set to in your application?

Best regards,

Simon