Could deviations from nRF52832 reference design cause chip to die during DTM testing?

RE: Could deviations from nRF52832 reference design cause chip to die during DTM testing?

ketiljo — Mon, 06 Apr 2020 13:01:19 GMT

As the design is now, we can't do any conducted measurements. Simply because there are no place (ground plane) to solder the coaxial cable to.

RE: Could deviations from nRF52832 reference design cause chip to die during DTM testing?

wes_nCase — Fri, 03 Apr 2020 15:09:57 GMT

That is what I was hoping. Gene Rittenhouse recommended that I ask you about sending our hardware to you for RF analysis. Is that something we can do and if so how do we proceed? Thanks again for the help!

RE: Could deviations from nRF52832 reference design cause chip to die during DTM testing?

ketiljo — Fri, 03 Apr 2020 09:28:42 GMT

C12 is part of the matching network and does some harmonic filtering. It might be that the layout you have there does some of the filtering by design and luck. So if you're happy with the range and are able to get it certified, by all means use it as it is.

RE: Could deviations from nRF52832 reference design cause chip to die during DTM testing?

wes_nCase — Fri, 03 Apr 2020 01:25:12 GMT

Thanks so much for the help Ketiljo. If our design was able to pass CE testing and we are getting acceptable signal strength do you think we still need to make changes? Would the items you pointed out only cause signal strength/efficiency issues or could it cause issues with chip functionality and/or other issues?

RE: Could deviations from nRF52832 reference design cause chip to die during DTM testing?

wes_nCase — Fri, 03 Apr 2020 01:04:36 GMT

Jay, thanks so much for reviewing our circuit. That makes sense about the UART at 3.3V and it sounds like that is probably what broke the part. We originally had C12 populated and were having signal strength issues. When we removed C12 the signal strength improved quite a bit and our engineer considered it a basic form of network matching. Would the items you pointed out only cause signal strength/efficiency issues or could it cause issues with chip functionality and/or other issues?

RE: Could deviations from nRF52832 reference design cause chip to die during DTM testing?

ketiljo — Wed, 01 Apr 2020 10:46:43 GMT

The deviations from the reference layout is so large that there is a high probability that it will fail CE testing due to spurious emissions.

The matching network shall look like this, note like C3 here is grounded:

Use a top side ground plane and make sure you don't route ground with tracks, but connect grounded pis to the ground plane. Use plenty of vias between the two ground planes.

Study the reference layout and make sure you copy it as best as you can. The center pad shall be grounded with at least 16 vias to the bottom side ground plane.

RE: Could deviations from nRF52832 reference design cause chip to die during DTM testing?

Jay Tyzzer — Tue, 31 Mar 2020 20:18:22 GMT

Please review the Datasheet as it relates to max voltage on the GPIO in relation to the VDD. Section 20.4.1 page 154. The UART at 3.3V with VDD at 1.8V is not ok. I believe this is why the part stopped working. On a separate somewhat unrelated note, the RF output Matching / harmonic network is incorrect. C12 should be populated. The trace from C12 to the VSS_PA is to long and will effect harmonic content. The design is also missing a matching network for the Antenna. There should be no traces or components near the antenna.

RE: Could deviations from nRF52832 reference design cause chip to die during DTM testing?

wes_nCase — Tue, 31 Mar 2020 19:51:43 GMT

Hi Jay,

Our board is usually powered by a 3V CR2450 coin cell battery through a 1.8v LDO to the VDD pins. We also have a port for testing that directly exposes pins that the UART plugs into and puts 3.3V directly on the VDD pins. When they were running the DTM testing they had the battery connected and the UART plugged in so VDD was receiving 1.8V from the battery/LDO and 3.3V from the UART. Does that make sense? Thank you for any help.

RE: Could deviations from nRF52832 reference design cause chip to die during DTM testing?

Jay Tyzzer — Tue, 31 Mar 2020 18:58:58 GMT

Hello Wes,

Can you clarify this please? " Unit being powered by UART and a lipo battery." Do you have a external LDO or DC/DC supplying the 1.8vdc?