SPI Master Example Fix

RE: SPI Master Example Fix

spline_pete — Mon, 21 Sep 2020 13:13:08 GMT

Ok, thanks. See this post:

https://devzone.nordicsemi.com/f/nordic-q-a/66111/asset-tracker---adding-spi-sensor

RE: SPI Master Example Fix

frax84 — Mon, 21 Sep 2020 07:42:48 GMT

Hi Pete,

i cannot share with you the full project, but i can try to provide some help if you tell me where you're stuck or what the errors are

RE: SPI Master Example Fix

spline_pete — Fri, 18 Sep 2020 17:38:03 GMT

I am struggling with SPI on the nRF9160 with Zephyr and an LIS2DW12. Can you share your full project?

RE: SPI Master Example Fix

frax84 — Wed, 15 Apr 2020 09:49:08 GMT

Hi,

thanks for the detailed answer.

I think it's perfectly clear now.

RE: SPI Master Example Fix

Håkon Alseth — Tue, 14 Apr 2020 10:20:38 GMT

Hi,

My apologies for the delayed answer. It has been Easter vacation period here in Norway.

Thank you for sharing. The SPI sample is currently out-dated, and it is correct; the ss-pin property does not exist, unfortunately.

Most driver implementations has its own property for SS pin, as this is essentially a GPIO output that is set/cleared (SPIM doesn't have a dedicated hardware CSN/SS pin). The nrfx_spim driver itself supports handling the SS pin, but this is disabled for the zephyr SPI port layer: https://github.com/NordicPlayground/fw-nrfconnect-zephyr/blob/master/drivers/spi/spi_nrfx_spim.c#L411

Having one SS pin for a driver only makes sense when you have one sensor that you're communicating with, but when adding more sensors, you want to add more SS-pins and the handling would shift towards the sensor driver instead.

Regarding atomic operations, these are more towards manipulating a variable without being interrupted, as explained in the documentation:

https://docs.zephyrproject.org/latest/reference/kernel/other/atomic.html

To disable/enable interrupts, this is the section you want to look at:

https://docs.zephyrproject.org/latest/reference/kernel/other/interrupts.html?interrupt#c.irq_lock

Kind regards,

Håkon

RE: SPI Master Example Fix

frax84 — Tue, 07 Apr 2020 14:05:07 GMT

I want to add a question about SPI. I would like to make SPIwrite and SPIread operations to be atomic so that interrupt are disabled during SPI transactions. Is it possible?

I saw that atomic operations are supported in Zephyr using:

CONFIG_ATOMIC_OPERATIONS_BUILTIN=y
CONFIG_ATOMIC_OPERATIONS_C=y

Does the nrf9160 support this? Do you have any suggestion to implement atomic block for SPI transactions?

Thank you,

Frax