SAADC and retriggering

RE: SAADC and retriggering

Jannebozz — Mon, 11 May 2020 08:31:42 GMT

Hi,
Ok, that makes sense. Will try and see. Thanks!

RE: SAADC and retriggering

Jørgen Holmefjord — Fri, 08 May 2020 14:07:56 GMT

I looked over your code again. I see that you have the MAXCNT register set to the number of enabled channels. When you have started the SAADC, and the buffer has been filled, the END event will be generated. At this point, the SAADC will be in stopped state. If you want to sample again, you need to trigger the START task again. If you want to sample multiple times in a loop, without triggering START, you can increase the buffer size and wait for the DONE/RESULTDONE events between each sample.

RE: SAADC and retriggering

Jørgen Holmefjord — Wed, 29 Apr 2020 09:48:44 GMT

Ok, that is a revision 1 chip. I will try to get hold of a similar chip and test if I can reproduce the issue.

RE: SAADC and retriggering

Jannebozz — Mon, 27 Apr 2020 18:13:43 GMT

The marking says
52810
QCAAC0
1740AB

RE: SAADC and retriggering

Jørgen Holmefjord — Mon, 27 Apr 2020 13:11:46 GMT

You can check the markings on the chip against the table I linked, or post the marking here.

I do not have any nRF52810 chips available to test with at the moment, but if you can provide an example project that can reproduce the issue, I will try to have someone take a look at it.

RE: SAADC and retriggering

Jannebozz — Mon, 27 Apr 2020 13:08:42 GMT

Do the code work without oversampling? No
or without offset calibration? No
Where/how do you trigger the START task? This is done later in the init phase. Pretty much straight after calibration
Have you tested with higher acquisition time? Yes, but the problem still is the same.

Not sure how to check hw revision?

RE: SAADC and retriggering

Jørgen Holmefjord — Mon, 27 Apr 2020 12:58:39 GMT

Hi,

Do the code work without oversampling, or without offset calibration? Where/how do you trigger the START task? Have you tested with higher acquisition time? We have had quite a few erratas with tacq < 5 us in nRF52832, but most of these should have been fixed in nRF52810.

Which revision is the nRF52810 chip you are testing this on?

Best regards,
Jørgen