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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>nrf9160 SPI reading problems</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/61196/nrf9160-spi-reading-problems</link><description>Hello, 
 i&amp;#39;m trying to use SPI with nrf9160DK as master and RFM96 module as slave. At the moment, i&amp;#39;m developing elementary functions to write and read from my slave device. RFM9X module needs the following settings: 
 Word size: 8bit, CPOL=0, CPHA=0</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Wed, 13 May 2020 12:55:46 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/61196/nrf9160-spi-reading-problems" /><item><title>RE: nrf9160 SPI reading problems</title><link>https://devzone.nordicsemi.com/thread/249734?ContentTypeID=1</link><pubDate>Wed, 13 May 2020 12:55:46 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:a259f90e-e7fe-4582-819c-0ef12f6ad3a1</guid><dc:creator>frax84</dc:creator><description>&lt;p&gt;Hi Kennet,&lt;/p&gt;
&lt;p&gt;thank you for your answer. Going in order:&lt;/p&gt;
[quote userid="2111" url="~/f/nordic-q-a/61196/nrf9160-spi-reading-problems/249308"]This is somewhat similar to this case:&lt;br /&gt;&lt;a href="https://devzone.nordicsemi.com/f/nordic-q-a/60531/clarification-about-spim---ss-pin-management-for-nrf9160"&gt;https://devzone.nordicsemi.com/f/nordic-q-a/60531/clarification-about-spim---ss-pin-management-for-nrf9160&lt;/a&gt;[/quote]
&lt;p&gt;I well know this post, considering i&amp;#39;m the one who wrote it &lt;span class="emoticon" data-url="https://devzone.nordicsemi.com/cfs-file/__key/system/emoji/1f642.svg" title="Slight smile"&gt;&amp;#x1f642;&lt;/span&gt;&lt;/p&gt;
[quote userid="2111" url="~/f/nordic-q-a/61196/nrf9160-spi-reading-problems/249308"]so getting a trace is a good next step.&amp;nbsp;[/quote]
&lt;p&gt;My bad for not being totally clear about this. I have no logic analyzer, but i&amp;#39;m using a digital oscilloscope, so i&amp;#39;m confident that signals are going.&lt;/p&gt;
&lt;p&gt;Purpose of the&amp;nbsp;ticket was being sure that i had no code issues. By the way, taking my time to perform some &amp;quot;trial and error&amp;quot; test i&amp;#39;m able to address most of my questions now. Leaving the answers here for the purpose of sharing:&lt;/p&gt;
[quote userid="86927" url="~/f/nordic-q-a/61196/nrf9160-spi-reading-problems"]- Is the spi config structure correctly set or i missed anything? In particular i want to be sure that i understood CPOL and CPHA setting;[/quote]
&lt;p&gt;Yes, it is set correctly. In particular, SPI_MODE_CPOL and SPI_MODE_CPHA means respectively &amp;quot;Set SPI CPOL = 1&amp;quot; and &amp;quot;Set SPI CPHA=1&amp;quot;. Not setting, of course, means the opposite.&lt;/p&gt;
[quote userid="86927" url="~/f/nordic-q-a/61196/nrf9160-spi-reading-problems"]- What about the &amp;quot;slave&amp;quot; element of spi config structure? I have 1 slave so i suppose i had to set it to 1, but is it really necessary?[/quote]
&lt;p&gt;Seems not. I didn&amp;#39;t find any problem in changing slave from 0 to 1 and back. I don&amp;#39;t know what&amp;#39;s the purpose. Maybe Kenneth can make clear this point?&lt;/p&gt;
[quote userid="86927" url="~/f/nordic-q-a/61196/nrf9160-spi-reading-problems"]I&amp;#39;m having hard time getting a full grasp about &amp;quot;spi_buf&amp;quot; and &amp;quot;spi_buf_set&amp;quot; structure. While is intuitive understanding why &amp;quot;spi_buf&amp;quot; is structured like this, i don&amp;#39;t understand why &amp;quot;spi_buf_set&amp;quot; has a &amp;quot;count&amp;quot; element. Why should i set an array or spi_buf struct?[/quote]
&lt;p&gt;It can be generally useful when using multi slave. My bad for not thinking enough...&lt;/p&gt;
[quote userid="86927" url="~/f/nordic-q-a/61196/nrf9160-spi-reading-problems"] Is, in general, the flow described in the above picture reproduced by my code or i am missing anything?[/quote]
&lt;p&gt;This is a critical point. No, the code i described doesn&amp;#39;t work.&amp;nbsp;This is the correct code:&lt;/p&gt;
&lt;p&gt;&lt;pre class="ui-code" data-mode="c_cpp"&gt;int spi_dev_read(struct device * spi_dev, const struct spi_config * spi_cfg, 
                                                          u8_t reg_addr, u8_t * rx_data) {
  
  int err=0;
  
  //create the tx and rx buffer
  u8_t tx_buf[1]={SPI_READ_REGISTER|reg_addr};
  u8_t rx_buf[2];

  const struct spi_buf spi_tx_buf = {
	.buf = tx_buf,
	.len = sizeof(tx_buf),
  };
  const struct spi_buf_set tx = {
	.buffers = &amp;amp;spi_tx_buf,
	.count = 1,
  };

  const struct spi_buf spi_rx_buf = {
	.buf = rx_buf,
	.len = sizeof(rx_buf),
  };
  const struct spi_buf_set rx = {
	.buffers = &amp;amp;spi_rx_buf,
	.count = 1,
  };
  err = spi_transceive(spi_dev, spi_cfg,&amp;amp;tx, &amp;amp;rx);
  *rx_data = rx_buf[1];  //first byte is dummy, second one is the correct result
  return err;
}&lt;/pre&gt;&lt;/p&gt;
&lt;p&gt;Please note that this time i used transreceive and not spi_write + spi_read. This is because when used the spi_cs_control structure as pointed &lt;a href="https://devzone.nordicsemi.com/f/nordic-q-a/60531/clarification-about-spim---ss-pin-management-for-nrf9160"&gt;here&lt;/a&gt;&amp;nbsp; both spi_write and spi_read pull low (at the beginning) and high (at the end) of the function at the end of the function, while many spi devices want that write (register address) and read (register value) happen in the same transaction. This can be obtained even using&amp;nbsp;SPI_HOLD_ON_CS option, but i think is more efficient this way.&lt;/p&gt;
&lt;p&gt;I&amp;#39;m leaving the ticket open for further comments of Kenneth. I will close it in a few days if no comment come.&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;Best,&lt;/p&gt;
&lt;p&gt;Francesco&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: nrf9160 SPI reading problems</title><link>https://devzone.nordicsemi.com/thread/249308?ContentTypeID=1</link><pubDate>Mon, 11 May 2020 20:37:28 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:e60575ad-91cf-422e-bf90-4c47923c7c9c</guid><dc:creator>Kenneth</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;This is somewhat similar to this case:&lt;br /&gt;&lt;a href="https://devzone.nordicsemi.com/f/nordic-q-a/60531/clarification-about-spim---ss-pin-management-for-nrf9160"&gt;https://devzone.nordicsemi.com/f/nordic-q-a/60531/clarification-about-spim---ss-pin-management-for-nrf9160&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;To be able to debug this further you will need an logic analyzer trace, I can highly recommend&amp;nbsp;&lt;a href="https://www.saleae.com/"&gt;https://www.saleae.com/&lt;/a&gt;, then you can observe all data pins and see exactly how the configuration will change the transfer. You can also upload the trace for us to open here. At the moment the problem may be anything (even electrical), so getting a trace is a good next step.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Best regards,&lt;br /&gt;Kenneth&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>