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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>Complications with SPI configuration</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/61692/complications-with-spi-configuration</link><description>Hi, 
 I am having issues with getting SPI up and running on my nrf52840-DK using NCS. I&amp;#39;ve tried getting support about this in another ticket but it seems like it lead to a dead end https://devzone.nordicsemi.com/f/nordic-q-a/60878/configuring-spi0--</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Tue, 16 Jun 2020 13:50:28 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/61692/complications-with-spi-configuration" /><item><title>RE: Complications with SPI configuration</title><link>https://devzone.nordicsemi.com/thread/255290?ContentTypeID=1</link><pubDate>Tue, 16 Jun 2020 13:50:28 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:f251aeea-2f5c-4b1e-9ace-457c3369c241</guid><dc:creator>Shaney</dc:creator><description>&lt;p&gt;As an update incase anyone else struggles with the same issue. The problem seem to have been the .dts file. The one for nrf52840 devkit that is included in ncs, nrf52840_pca10056 states the following:&lt;/p&gt;
&lt;p&gt;&lt;pre class="ui-code" data-mode="text"&gt;&amp;amp;spi0 {
	compatible = &amp;quot;nordic,nrf-spi&amp;quot;;
	/* Cannot be used together with i2c0. */
	status = &amp;quot;okay&amp;quot;;
	sck-pin = &amp;lt;27&amp;gt;;
	mosi-pin = &amp;lt;26&amp;gt;;
	miso-pin = &amp;lt;29&amp;gt;;
};&lt;/pre&gt;&lt;/p&gt;
&lt;p&gt;Note the &amp;quot;compatible&amp;quot; filed only states nrf-spi and NOT nrf-spim. This resulted in not all files being generated, thus the error when trying to build .&lt;/p&gt;
&lt;p&gt;Adding compatible = &amp;quot;nrf-spim&amp;quot; at spi0,sp1 and spi2 fixed this. The same thing was needed for i2c, changing &amp;quot;nrf-twi&amp;quot; to &amp;quot;nrf-twim&amp;quot;.&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;The bus error can be ignored, it was just me making silly pointer errors.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Complications with SPI configuration</title><link>https://devzone.nordicsemi.com/thread/251297?ContentTypeID=1</link><pubDate>Fri, 22 May 2020 16:21:07 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:c142a81a-1c4f-4e5d-85c5-7bf687844ac1</guid><dc:creator>hmolesworth</dc:creator><description>&lt;p&gt;Probably not helpful, but I see you mentioned I2C/TWI worked. Just for clarification (in case a reader doesn&amp;#39;t know) SPI0 and TWI0 are the same underlying hardware which can be configured as SPI or TWI (but not both at the same time) and therefore share registers and interrupt. Any register left set by TWI0 (or be still in use by TWI0) can cause SPI0 to misbehave. SPI1 and TWI1 ditto; there are not 5 SPI &amp;amp; TWI interfaces, only 3 total.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Complications with SPI configuration</title><link>https://devzone.nordicsemi.com/thread/251214?ContentTypeID=1</link><pubDate>Fri, 22 May 2020 10:00:01 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:5e2afd2d-19d4-4c6d-86ae-50622a1dc1f8</guid><dc:creator>Shaney</dc:creator><description>&lt;p&gt;Seems like I managed to get SPI1 and SPI2 working. I will use these for the moment and see if I can figure out why SPIM0 doesn&amp;#39;t work. Please close ticket when able.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Complications with SPI configuration</title><link>https://devzone.nordicsemi.com/thread/251205?ContentTypeID=1</link><pubDate>Fri, 22 May 2020 09:27:21 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:e5d61ec0-f8b7-47f4-8fb7-59b2d69aa055</guid><dc:creator>Shaney</dc:creator><description>&lt;p&gt;Update, I&amp;#39;ve seem to be able to successfully bind SPI1, SPI2 and SPIM3. However, as soon as I try to write something I get hard fault.&lt;/p&gt;
&lt;p&gt;I init the SPI with the following function:&lt;/p&gt;
&lt;p&gt;&lt;pre class="ui-code" data-mode="text"&gt;int32_t get_spi_device(struct device* dev_ptr, char* dev)
{
  printk(&amp;quot;Getting device %s...\n&amp;quot;, dev);
  dev_ptr  = device_get_binding(dev);
  if(!dev_ptr)
  {
    printk(&amp;quot;Error getting %s\n&amp;quot;, dev);
    return 1;
  }
  
  return 0;
}
&lt;/pre&gt;&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;And I have the following settings and buffers:&lt;/p&gt;
&lt;p&gt;&lt;pre class="ui-code" data-mode="text"&gt;static struct spi_buf      tx_buf;
static struct spi_buf      rx_buf;

static struct spi_buf_set  tx_bufs = {
  .buffers = &amp;amp;tx_buf,
  .count = 1,
};

static struct spi_buf_set  rx_bufs = {
  .buffers = &amp;amp;rx_buf,
  .count = 1,
};

static const struct spi_config spi_cfg = {
	.operation = SPI_WORD_SET(8) | SPI_TRANSFER_MSB |
		     SPI_MODE_CPOL | SPI_MODE_CPHA,
	.frequency = 1000000,
	.slave = 0,
};&lt;/pre&gt;&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;And finally I try to write on the bus using:&lt;/p&gt;
&lt;p&gt;&lt;pre class="ui-code" data-mode="text"&gt;spi_write(spi1, &amp;amp;spi_cfg, &amp;amp;tx_bufs);&lt;/pre&gt;&lt;/p&gt;
&lt;p&gt;Once I try writing with this function the device hard faults. I&amp;#39;ve been trying to debug to see where the error occurs but I only reach&lt;strong&gt; static inline int z_impl_spi_transceive &lt;/strong&gt;before I get error &amp;quot;&lt;strong&gt;Not enough hardware instruction breakpoints&lt;/strong&gt;&amp;quot;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Complications with SPI configuration</title><link>https://devzone.nordicsemi.com/thread/251191?ContentTypeID=1</link><pubDate>Fri, 22 May 2020 08:43:05 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:f0047322-2f96-459a-9c87-37b3b7450f2d</guid><dc:creator>Shaney</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;Yeah I double checked the pins and have reverted to the default pins set in the .dts file:&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;&lt;pre class="ui-code" data-mode="text"&gt;&amp;amp;spi0 {
	compatible = &amp;quot;nordic,nrf-spi&amp;quot;;
        status = &amp;quot;okay&amp;quot;;
	sck-pin = &amp;lt;27&amp;gt;;
	mosi-pin = &amp;lt;26&amp;gt;;
	miso-pin = &amp;lt;29&amp;gt;;
};

&amp;amp;spi1 {
	compatible = &amp;quot;nordic,nrf-spi&amp;quot;;
	status = &amp;quot;okay&amp;quot;;
	sck-pin = &amp;lt;31&amp;gt;;
	mosi-pin = &amp;lt;30&amp;gt;;
	miso-pin = &amp;lt;40&amp;gt;;
};

&amp;amp;spi2 {
	compatible = &amp;quot;nordic,nrf-spi&amp;quot;;
	status = &amp;quot;okay&amp;quot;;
	sck-pin = &amp;lt;42&amp;gt;;
	mosi-pin = &amp;lt;43&amp;gt;;
	miso-pin = &amp;lt;44&amp;gt;;
};

&amp;amp;spi3 {
	status = &amp;quot;okay&amp;quot;;
	sck-pin = &amp;lt;47&amp;gt;;
	miso-pin = &amp;lt;46&amp;gt;;
	mosi-pin = &amp;lt;45&amp;gt;;
};&lt;/pre&gt;&lt;/p&gt;
&lt;p&gt;However, the issue still persists. &lt;/p&gt;
[quote userid="18935" url="~/f/nordic-q-a/61692/complications-with-spi-configuration/251188"]# CONFIG_SPI_0 is not set[/quote]
&lt;p&gt;This is intentional for now as the build fails if I enable this.&lt;/p&gt;
[quote userid="18935" url="~/f/nordic-q-a/61692/complications-with-spi-configuration/251188"]# CONFIG_SPI_1_NRF_SPIM is not set[/quote][quote userid="18935" url="~/f/nordic-q-a/61692/complications-with-spi-configuration/251188"]# CONFIG_SPI_2_NRF_SPIM is not set[/quote]
&lt;p&gt;This is also intentional because configuring SPI1 &amp;amp; SPi2 as the old deprecated way is the only way I&amp;#39;ve manage to get it working somewhat as expected.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Complications with SPI configuration</title><link>https://devzone.nordicsemi.com/thread/251188?ContentTypeID=1</link><pubDate>Fri, 22 May 2020 08:35:15 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:eb6b39b6-c479-4023-8966-63b329fbb676</guid><dc:creator>Turbo J</dc:creator><description>&lt;p&gt;I see some problems:&lt;/p&gt;
&lt;p&gt;Spi0:&lt;/p&gt;
&lt;p&gt;# CONFIG_SPI_0 is not set&lt;/p&gt;
&lt;p&gt;You need to enable SPI 0.&lt;/p&gt;
&lt;p&gt;Also check the following:&lt;/p&gt;
&lt;p&gt;# CONFIG_SPI_1_NRF_SPIM is not set&lt;/p&gt;
&lt;p&gt;# CONFIG_SPI_2_NRF_SPIM is not set&lt;/p&gt;
&lt;p&gt;Spi1:&lt;/p&gt;
&lt;p&gt;sck-pin = &amp;lt;0&amp;gt;;&lt;br /&gt;mosi-pin = &amp;lt;1&amp;gt;;&lt;/p&gt;
&lt;p&gt;P0.0 and P0.1 are the LF crystal pins and should never be used as anything else on the DK.&lt;/p&gt;
&lt;p&gt;SPIM3 has serious hardware bugs on the NRF52840 - see errata sheet. No idea whether the software workaround is properly implemented in zephyr - my guess would be: No.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>