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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>RTC Compare Interrupt Doesn&amp;#39;t Happen After Debugger Halted</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/6255/rtc-compare-interrupt-doesn-t-happen-after-debugger-halted</link><description>I am using the RTC1 compare event to generate a periodic interrupt. When I halt the bugger and and then run the interrupt doesn&amp;#39;t occur. Looking at the RTC1 register set shows the counter value is greater than the compare register. See example pictures</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Thu, 02 Apr 2015 23:47:42 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/6255/rtc-compare-interrupt-doesn-t-happen-after-debugger-halted" /><item><title>RE: RTC Compare Interrupt Doesn't Happen After Debugger Halted</title><link>https://devzone.nordicsemi.com/thread/21884?ContentTypeID=1</link><pubDate>Thu, 02 Apr 2015 23:47:42 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:9cafb532-71b3-4d03-be03-1d56b3b848a6</guid><dc:creator>WestCoastDaz</dc:creator><description>&lt;p&gt;RK, Thank you for your help on this.  I guess I need to let go of my MSP430 experiences.  I did consider setting the compare value to be a multiple greater than the clock.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: RTC Compare Interrupt Doesn't Happen After Debugger Halted</title><link>https://devzone.nordicsemi.com/thread/21883?ContentTypeID=1</link><pubDate>Thu, 02 Apr 2015 23:42:58 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:eb7914f2-909d-47b0-9c3c-2fa7a373395a</guid><dc:creator>RK</dc:creator><description>&lt;p&gt;I don&amp;#39;t think I&amp;#39;d call that useless. Point is RTC keeps running during debug mode (which is why processors with a SysTick function often have a flag to disable it in debug) and your code doesn&amp;#39;t defend against being late servicing the interrupt by more than the next timer delay. 1/128 second is pretty long so the chances of missing one outside debugging is pretty low, not zero however, if you end up using the softdevice that can in worst case take about 6ms, if you have other pending interrupts, you could miss it.&lt;/p&gt;
&lt;p&gt;Many ways to fix it. If you need the interrupt, even late, then detect you aren&amp;#39;t going to get it from the RTC because you missed it and just set the interrupt yourself to cause it to run again, you&amp;#39;ll catch up soon enough. If you don&amp;#39;t need every pulse then just ensure you add multiples of 256 until your next interrupt time is in the future (by at least 2 clock pulses).&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: RTC Compare Interrupt Doesn't Happen After Debugger Halted</title><link>https://devzone.nordicsemi.com/thread/21882?ContentTypeID=1</link><pubDate>Thu, 02 Apr 2015 22:20:42 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:378b4b0e-8b4e-43f1-90fe-90db3afdc8b5</guid><dc:creator>WestCoastDaz</dc:creator><description>&lt;p&gt;RK,&lt;/p&gt;
&lt;p&gt;You are right, the interrupt does occur after waiting for the counter to wrap.  In my opinion this is pretty useless for debugging if you need to wait for the counter to wrap.  I haven&amp;#39;t encountered this in type of issues in my 10+ years of embedded system development.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: RTC Compare Interrupt Doesn't Happen After Debugger Halted</title><link>https://devzone.nordicsemi.com/thread/21880?ContentTypeID=1</link><pubDate>Wed, 01 Apr 2015 06:17:07 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:54a307d8-8c5d-4093-bf36-7ab2071b26fb</guid><dc:creator>RK</dc:creator><description>&lt;p&gt;So the registers show the interrupt is pending - not quite sure where you are at this point however. I don&amp;#39;t think the interrupt enable registers are showing there so can&amp;#39;t tell if it is or not, I&amp;#39;m assuming it is.&lt;/p&gt;
&lt;p&gt;One thing which stands out, if you run that code and then break, what I&amp;#39;d expect to happen is the interrupt to pend, as soon as you resume the interrupt handler to get called, you add 256 to the CC[0] register but that represents 1/128 of a second, so you&amp;#39;ve already missed that starting and stopping the debugger. So I&amp;#39;d expect you not to see the next interrupt for about another 512 seconds (less the time you were stopped).&lt;/p&gt;
&lt;p&gt;That&amp;#39;s not what you described in the original post, but is that what you are seeing?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: RTC Compare Interrupt Doesn't Happen After Debugger Halted</title><link>https://devzone.nordicsemi.com/thread/21881?ContentTypeID=1</link><pubDate>Wed, 01 Apr 2015 02:50:09 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:19db2cf0-17e5-44da-800a-e879b6482385</guid><dc:creator>WestCoastDaz</dc:creator><description>&lt;p&gt;RK,&lt;/p&gt;
&lt;p&gt;Thank you for talking the time to comment!  I looked into the items that you detailed in point 2 of your comment and I can&amp;#39;t find an interrupt of higher priority and interrupts don&amp;#39;t appear to be disabled.&lt;/p&gt;
&lt;p&gt;I have added main.c to this thread below as well as additional register views to the initial question.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: RTC Compare Interrupt Doesn't Happen After Debugger Halted</title><link>https://devzone.nordicsemi.com/thread/21879?ContentTypeID=1</link><pubDate>Tue, 31 Mar 2015 04:07:28 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:070b79ec-d0a5-4072-859c-5cb146f516c8</guid><dc:creator>RK</dc:creator><description>&lt;ol&gt;
&lt;li&gt;
&lt;p&gt;works fine for me - do this all the time - doing it right now. I can stop the debugger as long as I like, no problem getting the compare interrupt afterwards.&lt;/p&gt;
&lt;/li&gt;
&lt;li&gt;
&lt;p&gt;As your display shows, the compare event is triggered and the interrupt enable bit is set. Whilst those things are true, the interrupt will be triggered. So either it&amp;#39;s disabled, all interrupts are disabled, or you have another interrupt on another event, of higher priority, which is constantly triggering because the event isn&amp;#39;t cleared.&lt;/p&gt;
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