SPIM at 32MHz timing

RE: SPIM at 32MHz timing

AKYR — Tue, 30 Jun 2020 09:46:02 GMT

Here it is in the post https://devzone.nordicsemi.com/f/nordic-q-a/33982/sdk-15-software-crash-during-spi-session/216252

RE: SPIM at 32MHz timing

AKYR — Tue, 30 Jun 2020 09:45:20 GMT

RE: SPIM at 32MHz timing

Mars_xu — Tue, 30 Jun 2020 09:43:07 GMT

How can I not find the sample code for spim3 dedicated ram?

RE: SPIM at 32MHz timing

Mars_xu — Tue, 30 Jun 2020 09:42:57 GMT

How can I not find the sample code for spim3 dedicated ram?

RE: SPIM at 32MHz timing

AKYR — Thu, 18 Jun 2020 16:21:29 GMT

https://devzone.nordicsemi.com/f/nordic-q-a/33982/sdk-15-software-crash-during-spi-session/216252 looks to be the way indeed, thank you for your help.

RE: SPIM at 32MHz timing

AKYR — Thu, 18 Jun 2020 11:56:50 GMT

Ok thanks !

Indeed with SD disabled and workaround 198 the errors on SPI bus disappear.

Unfortunately my app needs the SD enabled.

Does something like https://devzone.nordicsemi.com/f/nordic-q-a/33982/sdk-15-software-crash-during-spi-session/216252 before last answer about creating a section in RAM for SPIM3 would work with softdevice enable ? If so is there any source code example you may have ?

RE: SPIM at 32MHz timing

Turbo J — Thu, 18 Jun 2020 10:16:36 GMT

See SDK release notes, known issues: Does not work with softdevice enabled.

RE: SPIM at 32MHz timing

AKYR — Thu, 18 Jun 2020 10:03:58 GMT

Enabling NRFX_SPIM3_NRF52840_ANOMALY_198_WORKAROUND_ENABLED

Provoke error:

<error> app: SOFTDEVICE: INVALID MEMORY ACCESS

Any input on this ?

RE: SPIM at 32MHz timing

AKYR — Thu, 18 Jun 2020 09:42:50 GMT

Yeah I found that you were talking about errata 198 forget my last message. I'm trying it right now.

RE: SPIM at 32MHz timing

AKYR — Thu, 18 Jun 2020 09:20:34 GMT

Hello and thanks for your answer !

I've indeed manually set the GPIOs used for SPI in high drive mode '0' and '1' (PIN_CNF[n] = 0x3xx).

Looking at "bool errata_66()" which has the same build requirement for the flaw it looks like i'm in a build with this default but I can't find in my SDK nor in the new 16.0.0 SDK an "errata_174()" reference.

Do you have a patch for the errata you mentionned or some input on how to ensure if I have this flaw ?

Thanks.

RE: SPIM at 32MHz timing

Turbo J — Wed, 17 Jun 2020 16:48:36 GMT

Did you remember to check the errata sheet and implemented the required workaround for EasyDMA on SPIM3?

Also, you need to manually put the SPI output pins in high drive mode IIRC.