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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>DAP acquire sequence and maximum CLK speed</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/63052/dap-acquire-sequence-and-maximum-clk-speed</link><description>Hello, 
 I am designing a test jig with embedded gang programmer (10 targets) for our NRF52840 module and i have issue with reliable target acquisition, i would like to know what is the expected acquisition sequence (delay time for reset and timing /</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Fri, 09 Oct 2020 15:15:18 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/63052/dap-acquire-sequence-and-maximum-clk-speed" /><item><title>RE: DAP acquire sequence and maximum CLK speed</title><link>https://devzone.nordicsemi.com/thread/274094?ContentTypeID=1</link><pubDate>Fri, 09 Oct 2020 15:15:18 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:63393f9b-d032-4951-8a08-3e11fb5b2433</guid><dc:creator>lo</dc:creator><description>&lt;p&gt;Thank you&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: DAP acquire sequence and maximum CLK speed</title><link>https://devzone.nordicsemi.com/thread/273903?ContentTypeID=1</link><pubDate>Fri, 09 Oct 2020 06:05:20 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:7d7169f2-1773-4006-861f-ce8624e63995</guid><dc:creator>Einar Thorsrud</dc:creator><description>&lt;p&gt;Regarding the&amp;nbsp;acquisition sequence we do not have numbers specific for SWD. However, the&amp;nbsp;&lt;span&gt;t&lt;/span&gt;&lt;sub&gt;R2ON&lt;/sub&gt; numbers from the &lt;a href="https://infocenter.nordicsemi.com/topic/ps_nrf52840/power.html?cp=4_0_0_4_2_7_2#unique_1094698514"&gt;Device startup times table&lt;/a&gt;&amp;nbsp;can be used. Please note that these numbers are not entirely accurate for SWD as parts of the logic is different, but it should be in the right ballpark.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: DAP acquire sequence and maximum CLK speed</title><link>https://devzone.nordicsemi.com/thread/273511?ContentTypeID=1</link><pubDate>Wed, 07 Oct 2020 13:25:09 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:507701d8-5e19-4a70-983a-7729971e7489</guid><dc:creator>lo</dc:creator><description>&lt;p&gt;thank you for this useful information&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: DAP acquire sequence and maximum CLK speed</title><link>https://devzone.nordicsemi.com/thread/273510?ContentTypeID=1</link><pubDate>Wed, 07 Oct 2020 13:23:57 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:75f3f368-9377-4ff2-86f0-1d428ba19cf0</guid><dc:creator>Einar Thorsrud</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;I am sorry for the late reply. The maximum frequency for the CLK is 8 MHz (see &lt;a href="https://infocenter.nordicsemi.com/topic/ps_nrf52840/dif.html?cp=4_0_0_3_7_1_1#unique_369981888"&gt;electrical specification for the CTRL-AP&lt;/a&gt;). I have not found answers about the timing though, but I will attempt to get it and get back to you.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: DAP acquire sequence and maximum CLK speed</title><link>https://devzone.nordicsemi.com/thread/271875?ContentTypeID=1</link><pubDate>Mon, 28 Sep 2020 17:38:41 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:6c8b7c1e-1e83-418a-aa67-b3a9208c4c19</guid><dc:creator>lo</dc:creator><description>&lt;p&gt;Hello,&lt;/p&gt;
&lt;p&gt;IS there any update on this ticket? its been 3 month...&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: DAP acquire sequence and maximum CLK speed</title><link>https://devzone.nordicsemi.com/thread/257570?ContentTypeID=1</link><pubDate>Tue, 30 Jun 2020 12:14:55 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:a5392b7a-43c2-45aa-a40e-3b7abf6d91cd</guid><dc:creator>Susheel Nuguru</dc:creator><description>&lt;p&gt;seems like the person who can answer this is on summer vacation, we need to wait until he comes back.&lt;/p&gt;
&lt;p&gt;Sorry for the inconvenience&amp;nbsp;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: DAP acquire sequence and maximum CLK speed</title><link>https://devzone.nordicsemi.com/thread/257284?ContentTypeID=1</link><pubDate>Mon, 29 Jun 2020 08:01:07 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:54acb31a-eab0-49d0-865f-5c5a7dd36a7a</guid><dc:creator>Susheel Nuguru</dc:creator><description>&lt;p&gt;I do not have these numbers with me, but I have asked my colleague regarding this who might have some estimates. I will be back to you when I have some response from him.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>