<?xml version="1.0" encoding="UTF-8" ?>
<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>SPI master on nRF5122</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/6375/spi-master-on-nrf5122</link><description>I&amp;#39;m using nRF51822 SoC and I have a LIS3DSH accelerometer connected to the ship via SPI bus . I used the SPI master example . So i used the switch_state() function then took the rx_data and tx_data . But when debugging the Keil logic analyzer don&amp;#39;t show</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Sun, 12 Jul 2015 12:22:59 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/6375/spi-master-on-nrf5122" /><item><title>RE: SPI master on nRF5122</title><link>https://devzone.nordicsemi.com/thread/22222?ContentTypeID=1</link><pubDate>Sun, 12 Jul 2015 12:22:59 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:8a08bb55-395e-4772-9f65-04c68b23c424</guid><dc:creator>Yasmine_Chtourou</dc:creator><description>&lt;p&gt;frequency for example , maybe the device ur connecting spi with don&amp;#39;t support a high frequency for example. if you toggle a break point just after the spi-init() and take a look to the spi register are they set to the right values ?
I&amp;#39;m just trying to figure out what&amp;#39;s the prob.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI master on nRF5122</title><link>https://devzone.nordicsemi.com/thread/22221?ContentTypeID=1</link><pubDate>Sun, 12 Jul 2015 10:33:56 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:4b88c416-687d-4699-8c2d-1f3ed64de013</guid><dc:creator>flynnnn</dc:creator><description>&lt;p&gt;how the four pins connect?especially the select pin,and what is The corresponding configuration?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI master on nRF5122</title><link>https://devzone.nordicsemi.com/thread/22220?ContentTypeID=1</link><pubDate>Sun, 12 Jul 2015 10:31:07 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:faccba4d-7c4a-4990-8882-b4585d5b6591</guid><dc:creator>flynnnn</dc:creator><description>&lt;p&gt;For example?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI master on nRF5122</title><link>https://devzone.nordicsemi.com/thread/22219?ContentTypeID=1</link><pubDate>Sat, 11 Jul 2015 16:48:42 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:5c85b1a4-38ba-4ed9-bce1-fa9246d58d6a</guid><dc:creator>Yasmine_Chtourou</dc:creator><description>&lt;p&gt;i didn&amp;#39;t know what&amp;#39;s the problem exactly. check the configuration again. i know it&amp;#39;s so delicate and stressfull :/&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI master on nRF5122</title><link>https://devzone.nordicsemi.com/thread/22218?ContentTypeID=1</link><pubDate>Sat, 11 Jul 2015 15:19:56 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:515b07df-a009-43ab-a057-dd9f8cd29797</guid><dc:creator>flynnnn</dc:creator><description>&lt;p&gt;yes,why the chip stop?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI master on nRF5122</title><link>https://devzone.nordicsemi.com/thread/22217?ContentTypeID=1</link><pubDate>Sat, 11 Jul 2015 12:35:58 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:fc029165-dce7-4ae1-8ef9-953f9ed6b575</guid><dc:creator>Yasmine_Chtourou</dc:creator><description>&lt;p&gt;you have a problem with the sd_nvic calls ?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI master on nRF5122</title><link>https://devzone.nordicsemi.com/thread/22216?ContentTypeID=1</link><pubDate>Sat, 11 Jul 2015 10:09:32 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:92768ee0-ae69-4e5d-8129-408a9fd6c1f6</guid><dc:creator>flynnnn</dc:creator><description>&lt;p&gt;hi,Mr Chtourouh,how did you solve your problem.my problem like yours ,when run  spi_master_send_recv(),chip stuck,why?please ,i am depressed&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI master on nRF5122</title><link>https://devzone.nordicsemi.com/thread/22214?ContentTypeID=1</link><pubDate>Wed, 22 Apr 2015 20:02:35 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:b8adc2e8-7ab8-4bbf-9da7-c5a2cca6bff1</guid><dc:creator>Yasmine_Chtourou</dc:creator><description>&lt;p&gt;the only difference is that i didn&amp;#39;t add the   ............\components\drivers_nrf\spi_master . now i have no more problems with the sd_nvic calls . Thank you very much =) !&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI master on nRF5122</title><link>https://devzone.nordicsemi.com/thread/22213?ContentTypeID=1</link><pubDate>Wed, 22 Apr 2015 12:52:10 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:0d367e6e-8920-4705-9edc-223ec2c119ce</guid><dc:creator>Stian R&amp;#248;ed Hafskjold</dc:creator><description>&lt;p&gt;I edited the post to include the steps I did to enable SPI in a BLE project&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI master on nRF5122</title><link>https://devzone.nordicsemi.com/thread/22212?ContentTypeID=1</link><pubDate>Wed, 22 Apr 2015 05:40:21 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:429fa505-1c0b-41d9-8c04-e1a8f8e6cc78</guid><dc:creator>RK</dc:creator><description>&lt;p&gt;No the CPU doesn&amp;#39;t &amp;quot;stop&amp;quot;, CPUs don&amp;#39;t just stop, it&amp;#39;s somewhere doing something. Hit break in the debugger and find out where it is and see if the stack trace tells you anything useful about what it&amp;#39;s up to. Either it&amp;#39;s in a loop, in a fault handler or on a WFE/WFI instruction (unlikely), but CPUs don&amp;#39;t just give up, it&amp;#39;s somewhere.&lt;/p&gt;
&lt;p&gt;Single-step the assembler if necessary to get a fine-grained view of where it&amp;#39;s going.&lt;/p&gt;
&lt;p&gt;oh and usual question, what version of the Softdevice is on the chip, not just S110, what version of S110 and what SDK are you using to build the app, they have to match&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI master on nRF5122</title><link>https://devzone.nordicsemi.com/thread/22211?ContentTypeID=1</link><pubDate>Wed, 22 Apr 2015 02:12:56 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:572b7483-68c4-409e-b99d-af1389f581f5</guid><dc:creator>Yasmine_Chtourou</dc:creator><description>&lt;p&gt;I already used other function from the soft device ( like sd_ble_gatts_value_set) and it works quite well . so I guess I enabled the soft device.
I already tried before the example you proposed :&lt;/p&gt;
&lt;pre&gt;&lt;code&gt;uint32_t err=sd_nvic_ClearPendingIRQ(p_spi_instance-&amp;gt;irq_type);
APP_ERROR_CHECK(err);
&lt;/code&gt;&lt;/pre&gt;
&lt;p&gt;But in order to see the err value the debugger should be able to attempt the APP_ERROR_CHECK(err); line . But it never does . when the debugging line is on any line that contains a sd_nvic .. function call it stops.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI master on nRF5122</title><link>https://devzone.nordicsemi.com/thread/22210?ContentTypeID=1</link><pubDate>Wed, 22 Apr 2015 00:33:25 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:c8038ba8-fb62-424e-901e-7a816a162da6</guid><dc:creator>RK</dc:creator><description>&lt;p&gt;That was 50% of the question, whether you are or are not using a softdevice. The second half was&lt;/p&gt;
&lt;p&gt;&amp;quot;have you enabled it before getting to the SPI code?&amp;quot;&lt;/p&gt;
&lt;p&gt;You say that you never return from this line&lt;/p&gt;
&lt;pre&gt;&lt;code&gt;APP_ERROR_CHECK(sd_nvic_ClearPendingIRQ(p_spi_instance-&amp;gt;irq_type));
&lt;/code&gt;&lt;/pre&gt;
&lt;p&gt;Is that correct?&lt;/p&gt;
&lt;p&gt;Do you understand what that line does? It calls sd_nvic_ClearPendingIRQ() and then passes the result code of that call to APP_ERROR_CHECK(). APP_ERROR_CHECK() does nothing if the result was NRF_SUCCESS (ie 0) and calls app_error_handler() with the error code, line and filename if non-zero.&lt;/p&gt;
&lt;p&gt;If you supplied app_error_check() yourself, put a breakpoint in it and see what the error code is. If you didn&amp;#39;t, put a breakpoint in the one in app_error.c. Or split the line into&lt;/p&gt;
&lt;pre&gt;&lt;code&gt;uint32_t err=sd_nvic_ClearPendingIRQ(p_spi_instance-&amp;gt;irq_type);
APP_ERROR_CHECK(err);
&lt;/code&gt;&lt;/pre&gt;
&lt;p&gt;and check &amp;#39;err&amp;#39;. What is it? Is it 2?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI master on nRF5122</title><link>https://devzone.nordicsemi.com/thread/22209?ContentTypeID=1</link><pubDate>Tue, 21 Apr 2015 21:37:05 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:11ecb0c0-dde7-4bcc-93bd-bf9fae6d3f8c</guid><dc:creator>Yasmine_Chtourou</dc:creator><description>&lt;p&gt;I&amp;#39;m really sorry i misplaced the &amp;quot; // the prob is in this function cal&amp;quot; comment . For spi_master_open the problem is in the sd_nvic .. functions . Yes i&amp;#39;m using S110 soft device.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI master on nRF5122</title><link>https://devzone.nordicsemi.com/thread/22208?ContentTypeID=1</link><pubDate>Tue, 21 Apr 2015 21:31:34 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:f1b79180-6324-40e3-be62-aa44dcab5d1f</guid><dc:creator>Stian R&amp;#248;ed Hafskjold</dc:creator><description>&lt;p&gt;Sorry.. In your code you say that spi_master_open returns with a no success, in the code comment. Is this correct? Or is it just the sd_nvic... function inside spi_master_open that fails ? Are you using a softdevice ?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI master on nRF5122</title><link>https://devzone.nordicsemi.com/thread/22203?ContentTypeID=1</link><pubDate>Tue, 21 Apr 2015 21:16:44 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:d569cdaf-0561-497e-905b-2e5bd6370be1</guid><dc:creator>Yasmine_Chtourou</dc:creator><description>&lt;p&gt;absolutly . Indeed , i created an uint32_t error_code ; then error_code=sd_nvic_ClearPendingIRQ(p_spi_instance-&amp;gt;irq_type) ;
then :  APP_ERROR_CHECK(error_code);
in  order to check if the problem is due to an error code returned from sd_nvic or some thing else . And same as before , while debugging , it doesn&amp;#39;t reach the APP_ERROR_CHECK(error_code);.
Before a  call of sd_nvic functions , is there some instructions or kind of nvic enable i should put ?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI master on nRF5122</title><link>https://devzone.nordicsemi.com/thread/22207?ContentTypeID=1</link><pubDate>Tue, 21 Apr 2015 21:07:04 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:5ddd2f9a-aee3-4d85-8e51-b5ca4bb3dd43</guid><dc:creator>Stian R&amp;#248;ed Hafskjold</dc:creator><description>&lt;p&gt;If you delete APP_ERROR_CHECK, there is nothing to catch the error. APP_ERROR_CHECK is there to check if the previous function returned with a success. If it did not return with a success, APP_ERROR_CHECK will stop the code execution. So you need to see why the previous function did not return with a success.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI master on nRF5122</title><link>https://devzone.nordicsemi.com/thread/22204?ContentTypeID=1</link><pubDate>Tue, 21 Apr 2015 19:55:19 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:75b29f79-96dc-4f13-8904-08c27524bb93</guid><dc:creator>Yasmine_Chtourou</dc:creator><description>&lt;p&gt;I&amp;#39;m sorry can&amp;#39;t post my code . for code confidentiality .  But i deleted the APP_ERROR_CHECK and just and it still didn&amp;#39;t work .&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI master on nRF5122</title><link>https://devzone.nordicsemi.com/thread/22223?ContentTypeID=1</link><pubDate>Tue, 21 Apr 2015 09:37:19 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:e1618675-a533-4952-a7b3-547cabce0ed6</guid><dc:creator>RK</dc:creator><description>&lt;p&gt;using a softdevice or not using a softdevice? If using a softdevice, have you enabled it before getting to the SPI code?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI master on nRF5122</title><link>https://devzone.nordicsemi.com/thread/22206?ContentTypeID=1</link><pubDate>Tue, 21 Apr 2015 07:18:30 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:91dcf563-ee2e-4d02-9beb-b0d4067f9ca4</guid><dc:creator>Stian R&amp;#248;ed Hafskjold</dc:creator><description>&lt;p&gt;The reason why it stops in APP_ERROR_CHECK, is probably because it receives an error code. That&amp;#39;s the point of APP_ERROR_CHECK. So you can catch the error code from the previous call while debugging. So you need to see where in the spi_master_open() it fails. If you look in spi_master_open() the most obvious is that SPI_MASTER_0_ENABLE (or 1) is not defined.&lt;/p&gt;
&lt;p&gt;It is easier if you just post all your code as a zip file.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI master on nRF5122</title><link>https://devzone.nordicsemi.com/thread/22205?ContentTypeID=1</link><pubDate>Tue, 21 Apr 2015 06:14:01 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:50b41717-0d23-453a-a863-fb8f63034863</guid><dc:creator>Yasmine_Chtourou</dc:creator><description>&lt;p&gt;@Stain i posted the code down here ( in the next answer )&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI master on nRF5122</title><link>https://devzone.nordicsemi.com/thread/22215?ContentTypeID=1</link><pubDate>Tue, 21 Apr 2015 06:11:51 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:37fb3dc8-c1ca-4e1e-8814-a7780f44a5c9</guid><dc:creator>Yasmine_Chtourou</dc:creator><description>&lt;p&gt;here is my code :
&lt;code&gt;&lt;/code&gt;&lt;/p&gt;
&lt;pre&gt;&lt;code&gt;main(){
..
spi_master_init(SPI_MASTER_0, spi_master_0_event_handler, true); 
spi_master_send_recv(SPI_MASTER_0, &amp;amp;Read_OUT_X_L_ADDR, 1, &amp;amp;buffer[0], 1); 
spi_master_send_recv(SPI_MASTER_0, &amp;amp;Read_OUT_X_H_ADDR, 1, &amp;amp;buffer[1], 1); 
spi_master_send_recv(SPI_MASTER_0, &amp;amp;Read_OUT_Y_L_ADDR, 1, &amp;amp;buffer[2], 1); 
spi_master_send_recv(SPI_MASTER_0, &amp;amp;Read_OUT_Y_H_ADDR, 1, &amp;amp;buffer[3], 1); 
spi_master_send_recv(SPI_MASTER_0, &amp;amp;Read_OUT_Z_L_ADDR, 1, &amp;amp;buffer[4], 1); 
spi_master_send_recv(SPI_MASTER_0, &amp;amp;Read_OUT_Z_H_ADDR, 1, &amp;amp;buffer[5], 1);
.. }
&lt;/code&gt;&lt;/pre&gt;

when i add a break point after spi_master_init(); it never reaches that break point. so here the changes that i made in the spi master init   
&lt;code&gt;
&lt;pre&gt;&lt;code&gt;static void spi_master_init(spi_master_hw_instance_t   spi_master_instance,
                            spi_master_event_handler_t spi_master_event_handler,
                            const bool                 lsb)
{
    uint32_t err_code = NRF_SUCCESS;

    // Configure SPI master.
    spi_master_config_t spi_config ;
          spi_config.SPI_Freq= SPI_FREQUENCY_FREQUENCY_M1;
          spi_config.SPI_CONFIG_CPHA=SPI_CONFIG_CPHA_Leading ;
          spi_config.SPI_CONFIG_CPOL=SPI_CONFIG_CPOL_ActiveHigh;
          spi_config.SPI_Pin_SCK  = 8;
          spi_config.SPI_Pin_MISO = 5;
          spi_config.SPI_Pin_MOSI = 4;
          spi_config.SPI_Pin_SS   = 3;
	  spi_config.SPI_DisableAllIRQ= 0;
	  spi_config.SPI_PriorityIRQ=APP_IRQ_PRIORITY_LOW ;
	spi_config.SPI_CONFIG_ORDER= SPI_CONFIG_ORDER_LsbFirst;
        
      spi_config.SPI_CONFIG_ORDER = (lsb ? SPI_CONFIG_ORDER_LsbFirst :        SPI_CONFIG_ORDER_MsbFirst);

    err_code = spi_master_open(spi_master_instance, &amp;amp;spi_config);// the prob is in this function call
    APP_ERROR_CHECK(err_code); 

    // Register event handler for SPI master.
    spi_master_evt_handler_reg(spi_master_instance, spi_master_event_handler);
}
&lt;/code&gt;&lt;/pre&gt;
&lt;code /&gt;
and the spi_master_open () ( the same as provided in the Spi)master.c file )
&lt;code&gt;
&lt;pre&gt;&lt;code&gt;spi_master_init_hw_instance(NRF_SPI0,SPI0_TWI0_IRQn, p_spi_instance, p_spi_master_config-&amp;gt;SPI_DisableAllIRQ);
//A Slave select must be set as high before setting it as output,
    //because during connect it to the pin it causes glitches.
    nrf_gpio_pin_set(p_spi_master_config-&amp;gt;SPI_Pin_SS);
    nrf_gpio_cfg_output(p_spi_master_config-&amp;gt;SPI_Pin_SS);
    nrf_gpio_pin_set(p_spi_master_config-&amp;gt;SPI_Pin_SS);

    //Configure GPIO
    nrf_gpio_cfg_output(p_spi_master_config-&amp;gt;SPI_Pin_SCK);
    nrf_gpio_cfg_output(p_spi_master_config-&amp;gt;SPI_Pin_MOSI);
    nrf_gpio_cfg_input(p_spi_master_config-&amp;gt;SPI_Pin_MISO, NRF_GPIO_PIN_NOPULL);
    p_spi_instance-&amp;gt;pin_slave_select = p_spi_master_config-&amp;gt;SPI_Pin_SS;

    /* Configure SPI hardware */
    p_spi_instance-&amp;gt;p_nrf_spi-&amp;gt;PSELSCK  = p_spi_master_config-&amp;gt;SPI_Pin_SCK;
    p_spi_instance-&amp;gt;p_nrf_spi-&amp;gt;PSELMOSI = p_spi_master_config-&amp;gt;SPI_Pin_MOSI;
    p_spi_instance-&amp;gt;p_nrf_spi-&amp;gt;PSELMISO = p_spi_master_config-&amp;gt;SPI_Pin_MISO;

    p_spi_instance-&amp;gt;p_nrf_spi-&amp;gt;FREQUENCY = p_spi_master_config-&amp;gt;SPI_Freq;

    p_spi_instance-&amp;gt;p_nrf_spi-&amp;gt;CONFIG =
        (uint32_t)(p_spi_master_config-&amp;gt;SPI_CONFIG_CPHA &amp;lt;&amp;lt; SPI_CONFIG_CPHA_Pos) |
        (p_spi_master_config-&amp;gt;SPI_CONFIG_CPOL &amp;lt;&amp;lt; SPI_CONFIG_CPOL_Pos) |
        (p_spi_master_config-&amp;gt;SPI_CONFIG_ORDER &amp;lt;&amp;lt; SPI_CONFIG_ORDER_Pos);

    /* Clear waiting interrupts and events */
    p_spi_instance-&amp;gt;p_nrf_spi-&amp;gt;EVENTS_READY = 0;
  

     APP_ERROR_CHECK(sd_nvic_ClearPendingIRQ(p_spi_instance-&amp;gt;irq_type));// while debugging it never go through this line//
    APP_ERROR_CHECK(sd_nvic_SetPriority(p_spi_instance-&amp;gt;irq_type, p_spi_master_config-&amp;gt;SPI_PriorityIRQ));
    ... 
&lt;/code&gt;&lt;/pre&gt;
&lt;code /&gt;
&lt;p&gt;In my case any call of the sd_nvic functions blocks the debugging . Any idea why ?&lt;/p&gt;
&lt;/code&gt;&lt;/code&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI master on nRF5122</title><link>https://devzone.nordicsemi.com/thread/22201?ContentTypeID=1</link><pubDate>Mon, 20 Apr 2015 12:25:18 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:78f355cd-fee7-4727-99af-432df2ac5421</guid><dc:creator>Stian R&amp;#248;ed Hafskjold</dc:creator><description>&lt;p&gt;I don&amp;#39;t know what that could be. You can post your code as an attachment in your question. Then I can test it here and see if it works.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI master on nRF5122</title><link>https://devzone.nordicsemi.com/thread/22202?ContentTypeID=1</link><pubDate>Sat, 18 Apr 2015 16:55:10 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:babd3a6f-3b99-478a-89aa-80666df066b7</guid><dc:creator>Yasmine_Chtourou</dc:creator><description>&lt;p&gt;any idea plz why it stops in
APP_ERROR_CHECK(sd_nvic_DisableIRQ(p_spi_instance-&amp;gt;irq_type));
?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI master on nRF5122</title><link>https://devzone.nordicsemi.com/thread/22200?ContentTypeID=1</link><pubDate>Tue, 14 Apr 2015 09:20:22 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:929b5477-65c5-4436-be35-0a6e07305201</guid><dc:creator>Yasmine_Chtourou</dc:creator><description>&lt;p&gt;If you may plz take a look at what i did ( i can&amp;#39;t use the loop back example since i have no mother board) :
in the spi-master_init() i configure the pins&lt;/p&gt;
&lt;pre&gt;&lt;code&gt;&amp;lt;code&amp;gt;
spi_config.SPI_Freq= SPI_FREQUENCY_FREQUENCY_M1;
					  spi_config.SPI_CONFIG_CPHA=SPI_CONFIG_CPHA_Leading ;
					  spi_config.SPI_CONFIG_CPOL=SPI_CONFIG_CPOL_ActiveHigh;
            spi_config.SPI_Pin_SCK  = 8;
            spi_config.SPI_Pin_MISO = 5;
            spi_config.SPI_Pin_MOSI = 4;
            spi_config.SPI_Pin_SS   = 3;
					spi_config.SPI_DisableAllIRQ= 0;
					spi_config.SPI_PriorityIRQ=APP_IRQ_PRIORITY_LOW ;
					spi_config.SPI_CONFIG_ORDER= SPI_CONFIG_ORDER_LsbFirst;
&amp;lt;/code&amp;gt;
&lt;/code&gt;&lt;/pre&gt;
&lt;p&gt;then in main code , i did as you said :&lt;/p&gt;
&lt;pre&gt;&lt;code&gt;&amp;lt;code&amp;gt;
spi_master_init(SPI_MASTER_0, spi_master_0_event_handler, false);
      tx_data[0] = (0x80 | OUT_X_L_addr); //Add the RW bit to the address.  
			spi_master_send_recv(SPI_MASTER_0, tx_data, 2, rx_data, 2);
			  if (rx_data[1] != 0 )
				{	
				  LedBlink();
				}
&amp;lt;/code&amp;gt;
&lt;/code&gt;&lt;/pre&gt;
&lt;p&gt;but while debugging it never reaches the if (..) ,  it stops in :
spi_master_send_recv(..)
..
//Disable interrupt SPI.
APP_ERROR_CHECK(sd_nvic_DisableIRQ(p_spi_instance-&amp;gt;irq_type));
..}
. What did i do wrong ? Or is there some thing missing ?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI master on nRF5122</title><link>https://devzone.nordicsemi.com/thread/22198?ContentTypeID=1</link><pubDate>Mon, 13 Apr 2015 18:17:30 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:018de56b-b8f9-4e7f-9657-705af1a93723</guid><dc:creator>Yasmine_Chtourou</dc:creator><description>&lt;p&gt;i&amp;#39;m using 7.2.0 sdk , and the nRF51 Dk but without a motherboard .&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>