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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>Question about nested interrupts</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/65005/question-about-nested-interrupts</link><description>Hi all, 
 There is a question that I want to figure out. 
 I have a nrf52 board which supports to use DMA to receive data from UART. So what would happen when BLE radio interrupt and swi(timer) interrupt occur in the same time? Whether swi interrupt can</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Thu, 20 Aug 2020 08:27:33 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/65005/question-about-nested-interrupts" /><item><title>RE: Question about nested interrupts</title><link>https://devzone.nordicsemi.com/thread/265482?ContentTypeID=1</link><pubDate>Thu, 20 Aug 2020 08:27:33 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:ec7c8b6a-b54b-4994-9785-2cc8d1afc493</guid><dc:creator>Einar Thorsrud</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;Yes, nested interrupts are supported. The Cortex-M4 core has the&amp;nbsp;&lt;a href="https://developer.arm.com/documentation/100166/0001/Nested-Vectored-Interrupt-Controller"&gt;Nested Vectored Interrupt Controller&lt;/a&gt;&amp;nbsp;(NVIC), which handles this. If a higher priority interrupts occurs while a lower priority interrupts is services, that will be presented and the higher priority interrupt will be serviced before continuing to service the lower priority interrupt.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>