nrf52840: strangeness in gpio registers description

RE: nrf52840: strangeness in gpio registers description

run_ar — Thu, 27 Aug 2020 09:49:30 GMT

[quote user="CheMax"]Ok. Apparently it's worth taking it as it is.[/quote]

Agree

RE: nrf52840: strangeness in gpio registers description

CheMax — Thu, 27 Aug 2020 09:03:53 GMT

Hi,

It's magic)

[quote userid="2112" url="~/f/nordic-q-a/65255/nrf52840-strangeness-in-gpio-registers-description/266642"]see Registers[/quote]

Ok, see. There is some dissonance when looking at this table.

[quote userid="2112" url="~/f/nordic-q-a/65255/nrf52840-strangeness-in-gpio-registers-description/266642"]The P1 base actually uses the same offset as the p0_base, and therefor P1 continues from 0x800, while p0 starts at 0x500[/quote]

Ok. Apparently it's worth taking it as it is.

Thank.

RE: nrf52840: strangeness in gpio registers description

run_ar — Thu, 27 Aug 2020 08:29:25 GMT

Hi,

Not sure why there is a reserved area in the beginning actually. But these are registry mappings that has to match the HW addresses -> see Registers

The P1 base actually uses the same offset as the p0_base, and therefor P1 continues from 0x800, while p0 starts at 0x500