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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>SPIM RX started by ppi delay about 6us</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/67648/spim-rx-started-by-ppi-delay-about-6us</link><description>HI all,I am looking for a help.how to start SPIM RX task immediately delay less than 2us？ 
 I have a SPIM test on 52832 DK board(QFAAE0) with SDK16.0, the MISO pin has connected with a GPIOTE pin together,when GPIOTE HITOLO event happened,ppi will trigger</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Fri, 30 Oct 2020 08:45:11 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/67648/spim-rx-started-by-ppi-delay-about-6us" /><item><title>RE: SPIM RX started by ppi delay about 6us</title><link>https://devzone.nordicsemi.com/thread/277746?ContentTypeID=1</link><pubDate>Fri, 30 Oct 2020 08:45:11 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:db8b4ab0-6121-4bde-bace-7cee525253e6</guid><dc:creator>H&amp;#229;kon Alseth</dc:creator><description>&lt;p&gt;If you look at figure 1 here in the GPIO chapter of the PS, the override signal from the peripheral is DIR_OVERRIDE and OUT_OVERRIDE, which disconnects the original GPIO configuration:&lt;/p&gt;
&lt;p&gt;&lt;a href="https://infocenter.nordicsemi.com/topic/com.nordic.infocenter.nrf52832.ps.v1.1/gpio.html?cp=4_2_0_19#concept_zyt_tcb_lr"&gt;https://infocenter.nordicsemi.com/topic/com.nordic.infocenter.nrf52832.ps.v1.1/gpio.html?cp=4_2_0_19#concept_zyt_tcb_lr&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Kind regards,&lt;/p&gt;
&lt;p&gt;Håkon&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPIM RX started by ppi delay about 6us</title><link>https://devzone.nordicsemi.com/thread/277724?ContentTypeID=1</link><pubDate>Fri, 30 Oct 2020 07:43:15 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:db0bc49f-ea47-4ae5-824a-cbaef8687c72</guid><dc:creator>xjhu</dc:creator><description>&lt;p&gt;Thank you very much.&lt;/p&gt;
&lt;p&gt;the 6us delay like disapeared after i turn off&amp;nbsp;NRF_LOG_ENABLED = 0,there has a strange thing when i turn on NRF_LOG again,the delay still less than 2us.&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
[quote userid="2115" url="~/f/nordic-q-a/67648/spim-rx-started-by-ppi-delay-about-6us/277551#277551"]There&amp;#39;s no guarantee that you can override a GPIO that has been claimed by a peripheral, especially an output configured one.[/quote]
&lt;p&gt;are you mean there has no way to turn mosi high after spim enable?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPIM RX started by ppi delay about 6us</title><link>https://devzone.nordicsemi.com/thread/277551?ContentTypeID=1</link><pubDate>Thu, 29 Oct 2020 09:37:48 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:13474c7a-142d-4202-b606-f595ff972f66</guid><dc:creator>H&amp;#229;kon Alseth</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
[quote user="xjhu"]like my first test code,i have called&amp;nbsp;&lt;span&gt;sd_power_mode_set(NRF_POWER_MODE_CONSTLAT).and it is no effect..&lt;/span&gt;[/quote]
&lt;p&gt;&amp;nbsp;This is strange. If you disable SD and use WFE, you get 2 us, which is still higher than what I get.&lt;/p&gt;
&lt;p&gt;I integrated my test into ble_app_template, with NRF_LOG disabled, still get 1 us delay at my end. Could you try the algorithm I posted to see if this gets you the same timing?&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
[quote user="xjhu"]I modify nrfx_spim_init like below, and i got&amp;nbsp;high first but return to low when call&amp;nbsp;nrf_spim_enable(p_spim).I think maybe spim put mosi to low by default.[/quote]
&lt;p&gt;&amp;nbsp;I suspected this, unfortunately. The SPI module takes over the GPIOs and configures them towards how it should actively handle the pins. MOSI = master out, slave in, meaning its an output seen from the nRF&amp;#39;s point-of-view, and it has been set to a defined level.&lt;/p&gt;
&lt;p&gt;There&amp;#39;s no guarantee that you can override a GPIO that has been claimed by a peripheral, especially an output configured one.&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Kind regards,&lt;/p&gt;
&lt;p&gt;Håkon&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPIM RX started by ppi delay about 6us</title><link>https://devzone.nordicsemi.com/thread/277500?ContentTypeID=1</link><pubDate>Thu, 29 Oct 2020 02:04:22 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:33323bab-74c3-4739-898f-ae8aecbc8930</guid><dc:creator>xjhu</dc:creator><description>[quote userid="2115" url="~/f/nordic-q-a/67648/spim-rx-started-by-ppi-delay-about-6us/277403#277403"]Did you set the constlat power mode (&lt;span&gt;&lt;span&gt;sd_power_mode_set(&lt;/span&gt;&lt;/span&gt;&lt;span&gt;NRF_POWER_MODE_CONSTLAT&lt;/span&gt;)) when testing this?[/quote]
&lt;p&gt;like my first test code,i have called&amp;nbsp;&lt;span&gt;sd_power_mode_set(NRF_POWER_MODE_CONSTLAT).and it is no effect..&lt;/span&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPIM RX started by ppi delay about 6us</title><link>https://devzone.nordicsemi.com/thread/277498?ContentTypeID=1</link><pubDate>Thu, 29 Oct 2020 01:59:32 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:0a944f83-c3ee-4e38-bc03-de98ede70ac7</guid><dc:creator>xjhu</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;I modify nrfx_spim_init like below, and i got&amp;nbsp;high first but return to low when call&amp;nbsp;nrf_spim_enable(p_spim).I think maybe spim put mosi to low by default.&lt;/p&gt;
&lt;p&gt;if (p_config-&amp;gt;mosi_pin != NRFX_SPIM_PIN_NOT_USED)&lt;br /&gt; {&lt;br /&gt; mosi_pin = p_config-&amp;gt;mosi_pin;&lt;br /&gt; nrf_gpio_pin_set(mosi_pin);//clear(mosi_pin);&lt;br /&gt; nrf_gpio_cfg_output(mosi_pin);&lt;br /&gt; }&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPIM RX started by ppi delay about 6us</title><link>https://devzone.nordicsemi.com/thread/277403?ContentTypeID=1</link><pubDate>Wed, 28 Oct 2020 13:37:17 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:e81a6e92-9ffb-4ae8-8387-5893cea6c681</guid><dc:creator>H&amp;#229;kon Alseth</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
[quote user="xjhu"]&lt;p&gt;but when i enable SPIM this pin go to low immediately.&lt;/p&gt;
&lt;p&gt;is it possible?&lt;/p&gt;[/quote]
&lt;p&gt;The nrfx_spim.c driver sets the default level in&amp;nbsp;&lt;span&gt;nrfx_spim_init&lt;/span&gt;. You can try to override this in the driver itself:&lt;/p&gt;
&lt;p&gt;&lt;pre class="ui-code" data-mode="text"&gt;    if (p_config-&amp;gt;mosi_pin != NRFX_SPIM_PIN_NOT_USED)
    {
        mosi_pin = p_config-&amp;gt;mosi_pin;
        nrf_gpio_pin_clear(mosi_pin);
        nrf_gpio_cfg_output(mosi_pin);
    }&lt;/pre&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
[quote user="xjhu"]but my project need support ble function and can not disable softdevice,is there any solution or method to avoid this kind of delay?[/quote]
&lt;p&gt;Did you set the constlat power mode (&lt;span&gt;&lt;span&gt;sd_power_mode_set(&lt;/span&gt;&lt;/span&gt;&lt;span&gt;NRF_POWER_MODE_CONSTLAT&lt;/span&gt;)) when testing this?&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Kind regards,&lt;/p&gt;
&lt;p&gt;Håkon&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPIM RX started by ppi delay about 6us</title><link>https://devzone.nordicsemi.com/thread/277384?ContentTypeID=1</link><pubDate>Wed, 28 Oct 2020 12:29:36 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:ad7f75f8-915e-4838-a31b-8767c871940c</guid><dc:creator>xjhu</dc:creator><description>&lt;p&gt;there also has another question,&lt;/p&gt;
&lt;p&gt;my project need the MOSI pin be&amp;nbsp;high level when SPIM is idle,&lt;/p&gt;
&lt;p&gt;but when i enable SPIM this pin go to low immediately.&lt;/p&gt;
&lt;p&gt;is it possible?if it is,then please let me know what i need to do.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPIM RX started by ppi delay about 6us</title><link>https://devzone.nordicsemi.com/thread/277380?ContentTypeID=1</link><pubDate>Wed, 28 Oct 2020 12:17:24 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:4e56cbc4-6bb7-4234-a9ac-d59d971ed18a</guid><dc:creator>xjhu</dc:creator><description>&lt;p&gt;when I switch off softdevice and other ble functions,use __WFE in main loop,I got 2us delay.&lt;/p&gt;
&lt;p&gt;but my project need support ble function and can not disable softdevice,is there any solution or method to avoid this kind of delay?&lt;/p&gt;
&lt;p&gt;thank you again.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPIM RX started by ppi delay about 6us</title><link>https://devzone.nordicsemi.com/thread/277374?ContentTypeID=1</link><pubDate>Wed, 28 Oct 2020 12:07:33 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:120868dc-2bb0-45e3-bb4b-0b347753f032</guid><dc:creator>xjhu</dc:creator><description>&lt;p&gt;HI&amp;nbsp;&lt;a class="internal-link view-user-profile" href="https://devzone.nordicsemi.com/members/hkn"&gt;H&amp;aring;kon Alseth&lt;/a&gt;，thanks your reply.&lt;/p&gt;
&lt;p&gt;my code is tested under enable softdevice(S132-7.0.1) and setup ble functions.&lt;/p&gt;
&lt;p&gt;I called&amp;nbsp;idle_state_handle() in main loop.&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;static void idle_state_handle(void)&lt;br /&gt;{&lt;br /&gt; ret_code_t err_code;&lt;br /&gt; &lt;br /&gt; err_code = nrf_ble_lesc_request_handler();&lt;br /&gt; APP_ERROR_CHECK(err_code);&lt;br /&gt; &lt;br /&gt; if (NRF_LOG_PROCESS() == false)&lt;br /&gt; {&lt;br /&gt; nrf_pwr_mgmt_run();&lt;br /&gt; }&lt;br /&gt;}&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;I will test your code and report the result.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPIM RX started by ppi delay about 6us</title><link>https://devzone.nordicsemi.com/thread/277309?ContentTypeID=1</link><pubDate>Wed, 28 Oct 2020 09:28:23 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:8e86869d-4f5d-403a-8ce1-5fc272c3ce6f</guid><dc:creator>H&amp;#229;kon Alseth</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;I setup a quick test related to your description, and I see a delay of approx. 1 us:&lt;/p&gt;
&lt;p&gt;&lt;img src="https://devzone.nordicsemi.com/resized-image/__size/320x240/__key/communityserver-discussions-components-files/4/8461.pastedimage1603877182496v1.png" alt=" " /&gt;&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Here&amp;#39;s my test source (based on peripherals/spi/ example in SDK 17):&lt;/p&gt;
&lt;p&gt;&lt;pre class="ui-code" data-mode="c_cpp"&gt;/**
 * Copyright (c) 2015 - 2020, Nordic Semiconductor ASA
 *
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without modification,
 * are permitted provided that the following conditions are met:
 *
 * 1. Redistributions of source code must retain the above copyright notice, this
 *    list of conditions and the following disclaimer.
 *
 * 2. Redistributions in binary form, except as embedded into a Nordic
 *    Semiconductor ASA integrated circuit in a product or a software update for
 *    such product, must reproduce the above copyright notice, this list of
 *    conditions and the following disclaimer in the documentation and/or other
 *    materials provided with the distribution.
 *
 * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
 *    contributors may be used to endorse or promote products derived from this
 *    software without specific prior written permission.
 *
 * 4. This software, with or without modification, must only be used with a
 *    Nordic Semiconductor ASA integrated circuit.
 *
 * 5. Any software provided in binary form under this license must not be reverse
 *    engineered, decompiled, modified and/or disassembled.
 *
 * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA &amp;quot;AS IS&amp;quot; AND ANY EXPRESS
 * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
 * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
 * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 */
#include &amp;quot;nrf_drv_spi.h&amp;quot;
#include &amp;quot;app_util_platform.h&amp;quot;
#include &amp;quot;nrf_gpio.h&amp;quot;
#include &amp;quot;nrf_delay.h&amp;quot;
#include &amp;quot;boards.h&amp;quot;
#include &amp;quot;app_error.h&amp;quot;
#include &amp;lt;string.h&amp;gt;
#include &amp;quot;nrf_log.h&amp;quot;
#include &amp;quot;nrf_log_ctrl.h&amp;quot;
#include &amp;quot;nrf_log_default_backends.h&amp;quot;
#include &amp;quot;nrf_drv_gpiote.h&amp;quot;
#include &amp;quot;nrf_ppi.h&amp;quot;

#define SPI_INSTANCE  0 /**&amp;lt; SPI instance index. */
static const nrf_drv_spi_t spi = NRF_DRV_SPI_INSTANCE(SPI_INSTANCE);  /**&amp;lt; SPI instance. */
static volatile bool spi_xfer_done;  /**&amp;lt; Flag used to indicate that SPI instance completed the transfer. */

#define TEST_STRING &amp;quot;Nordic test long string for testing&amp;quot;
static uint8_t       m_tx_buf[] = TEST_STRING;           /**&amp;lt; TX buffer. */
static uint8_t       m_rx_buf[sizeof(TEST_STRING) + 1];    /**&amp;lt; RX buffer. */
static const uint8_t m_length = sizeof(m_tx_buf);        /**&amp;lt; Transfer length. */

/**
 * @brief SPI user event handler.
 * @param event
 */
void spi_event_handler(nrf_drv_spi_evt_t const * p_event,
                       void *                    p_context)
{
    spi_xfer_done = true;
    NRF_LOG_INFO(&amp;quot;Transfer completed.&amp;quot;);
    if (m_rx_buf[0] != 0)
    {
        NRF_LOG_INFO(&amp;quot; Received:&amp;quot;);
        NRF_LOG_HEXDUMP_INFO(m_rx_buf, strlen((const char *)m_rx_buf));
    }
}

void ppi_setup(void)
{

    NRF_PPI-&amp;gt;CH[0].EEP = (uint32_t) nrf_drv_gpiote_in_event_addr_get(SPI_MISO_PIN);
    NRF_PPI-&amp;gt;CH[0].TEP = (uint32_t)(NRF_SPIM_Type *)&amp;amp;((spi.u.spim.p_reg)-&amp;gt;TASKS_RESUME);
    NRF_PPI-&amp;gt;CHENSET = PPI_CHENSET_CH0_Enabled &amp;lt;&amp;lt; PPI_CHENSET_CH0_Pos;
}

int main(void)
{
    bsp_board_init(BSP_INIT_LEDS);

    APP_ERROR_CHECK(NRF_LOG_INIT(NULL));
    NRF_LOG_DEFAULT_BACKENDS_INIT();

    nrf_drv_gpiote_init();

    nrf_drv_spi_config_t spi_config = NRF_DRV_SPI_DEFAULT_CONFIG;
    spi_config.ss_pin   = SPI_SS_PIN;
    spi_config.miso_pin = SPI_MISO_PIN;
    spi_config.mosi_pin = SPI_MOSI_PIN;
    spi_config.sck_pin  = SPI_SCK_PIN;
    APP_ERROR_CHECK(nrf_drv_spi_init(&amp;amp;spi, &amp;amp;spi_config, spi_event_handler, NULL));

    nrf_drv_gpiote_in_config_t cfg = NRFX_GPIOTE_CONFIG_IN_SENSE_HITOLO(true);
    cfg.pull = NRF_GPIO_PIN_PULLUP;
    nrfx_err_t err_code = nrf_drv_gpiote_in_init(SPI_MISO_PIN, &amp;amp;cfg, NULL);
    APP_ERROR_CHECK(err_code);
    nrf_drv_gpiote_in_event_enable(SPI_MISO_PIN, true);

    NRF_LOG_INFO(&amp;quot;SPI example started.&amp;quot;);
    ppi_setup();
    NRF_LOG_FLUSH();
    while (1)
    {
        // Reset rx buffer and transfer done flag
        memset(m_rx_buf, 0, m_length);
        spi_xfer_done = false;

        APP_ERROR_CHECK(nrf_drv_spi_transfer(&amp;amp;spi, m_tx_buf, m_length, m_rx_buf, m_length));
        nrf_spim_task_trigger(spi.u.spim.p_reg, NRF_SPIM_TASK_SUSPEND);
        while (!spi_xfer_done)
        {
            __WFE();
        }        

        bsp_board_led_invert(BSP_BOARD_LED_0);
        nrf_delay_ms(200);
    }
}
&lt;/pre&gt;&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Since I do not have your full example, I&amp;#39;m not able to test the exact same setup as you, but the above seems to work as intended.&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Kind regards,&lt;/p&gt;
&lt;p&gt;Håkon&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>