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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>nRF5340 MCK settings</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/68572/nrf5340-mck-settings</link><description>If i set register CONFIG.MCKEN to 1 so Master Clock generator is running and the output is on PSEL.MCK 
 and in the CONFIG.CLKCONFIG register i set the source to PCLK32M then enable the BYPASS 
 would i get the PCLK32M clock output directly on the PIN</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Tue, 22 Dec 2020 14:07:32 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/68572/nrf5340-mck-settings" /><item><title>RE: nRF5340 MCK settings</title><link>https://devzone.nordicsemi.com/thread/286323?ContentTypeID=1</link><pubDate>Tue, 22 Dec 2020 14:07:32 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:92d2e362-9e0a-4c21-980e-cc9706bec477</guid><dc:creator>WesC</dc:creator><description>&lt;p&gt;Yes, I read that in the PS. but i guess i would like to know if this is because this is a Hardware feature or is this a software limitation.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: nRF5340 MCK settings</title><link>https://devzone.nordicsemi.com/thread/286108?ContentTypeID=1</link><pubDate>Mon, 21 Dec 2020 15:41:49 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:ce81614b-c926-4947-83ae-b0df327caa6b</guid><dc:creator>WesC</dc:creator><description>&lt;p&gt;Ok.&amp;nbsp; If you set the CONFIG.CLKCONFIG to BYPASS.&amp;nbsp; the MCK will be equal to the Source Input and MCKFREQ setting will have no effect.&amp;nbsp; The customer would like the BYPASS to set the PSEL.MCK to the HFCLK or ACLK source, but still use the MCK and CONFIG.MCKFREQ for internal clocking.&amp;nbsp; Please see Figure 62 of the nRF5340 PS.&amp;nbsp; I am not sure of their use case for this, but this does not appear to be feasible based on the FIGURE 62, unless the connections are not HW and only SW interconnected.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: nRF5340 MCK settings</title><link>https://devzone.nordicsemi.com/thread/286101?ContentTypeID=1</link><pubDate>Mon, 21 Dec 2020 15:23:03 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:a927dacf-57db-4f40-acc4-e31eac5b21a5</guid><dc:creator>helsing</dc:creator><description>&lt;p&gt;A team member points to the &lt;a href="https://infocenter.nordicsemi.com/topic/ps_nrf5340/i2s.html?cp=3_0_0_6_14_9_26#register.CONFIG.CLKCONFIG"&gt;PS&lt;/a&gt; where the following is stated next to BYPASS:&lt;/p&gt;
&lt;p&gt;&amp;#39;Bypass clock generator. MCK will be equal to source input.&lt;br /&gt;&lt;br /&gt;If bypass is enabled the MCKFREQ setting has no effect.&amp;#39;&lt;/p&gt;
&lt;p&gt;Does this answer your question?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: nRF5340 MCK settings</title><link>https://devzone.nordicsemi.com/thread/286089?ContentTypeID=1</link><pubDate>Mon, 21 Dec 2020 14:55:26 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:a046750f-50bd-4757-823a-04c6569a4138</guid><dc:creator>helsing</dc:creator><description>&lt;p&gt;Hi wes, thank you for the follow up question. It does not sound feasible to us either, however, we are not sure whether we understand the question correctly. Would you be able to add some more details, or could you perhaps rephrase the question?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: nRF5340 MCK settings</title><link>https://devzone.nordicsemi.com/thread/285842?ContentTypeID=1</link><pubDate>Fri, 18 Dec 2020 13:35:12 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:c4e00c14-0cb5-4e46-8009-e4f90f463eae</guid><dc:creator>WesC</dc:creator><description>&lt;p&gt;It has been a while, but the customer still has a question about the BYPASS feature.&amp;nbsp; I dont think what he is looking to do is possible, but i would like your opinion.&lt;/p&gt;
&lt;p&gt;When&amp;nbsp;you set MCLK as BYPASS mode, the master clock generator no longer functions. they would like to BYPASS MCLK pin as ACLK or HFCLK and internal circuit still use the master clock generator. Not sure if this config is feasible.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: nRF5340 MCK settings</title><link>https://devzone.nordicsemi.com/thread/282294?ContentTypeID=1</link><pubDate>Fri, 27 Nov 2020 14:35:30 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:dbfa3ec0-6c8b-4f2f-8f2c-e786272e1581</guid><dc:creator>helsing</dc:creator><description>&lt;div&gt;Using the BYPASS feature in CONFIG.CLKCONFIG allows you to get the 32MHz peripheral clock directly on the MCK pin, that is correct. The CONFIG.MCKFREQ register will only work for the values listed in the documentation, and will not allow you to go higher than 16MHz.&lt;/div&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: nRF5340 MCK settings</title><link>https://devzone.nordicsemi.com/thread/281164?ContentTypeID=1</link><pubDate>Fri, 20 Nov 2020 15:52:57 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:16f41ee2-f17f-43a1-9cae-748e2ba6eff1</guid><dc:creator>WesC</dc:creator><description>&lt;p&gt;Update to my last comment.&amp;nbsp; I guess the Formula is bounded by the CONFIG.MCKFREQ register.&amp;nbsp; the last 12 bit are 0 so the maximum value in that register is 0xFFFFFF00.&amp;nbsp; using this would give you a maximum output of 32Mhz for MCK.&amp;nbsp;&amp;nbsp;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: nRF5340 MCK settings</title><link>https://devzone.nordicsemi.com/thread/281162?ContentTypeID=1</link><pubDate>Fri, 20 Nov 2020 15:42:41 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:a5fa2767-2301-41c4-b6ef-d3bb0bffe4ac</guid><dc:creator>WesC</dc:creator><description>&lt;p&gt;Thanks.&amp;nbsp; I guess i will have a follow up question.&amp;nbsp; DO we know what the maximum MCK frequency we can support on the 5340?&amp;nbsp; if we enable CONFIG.MCKEN&amp;nbsp;the CONFIG.MCKFREQ register says the values are depreciated and should use the formula.&amp;nbsp; the formula is not bounded and based on the depreciated values it appears the 16Mhz is the max.&amp;nbsp; DO we know the real values?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: nRF5340 MCK settings</title><link>https://devzone.nordicsemi.com/thread/281146?ContentTypeID=1</link><pubDate>Fri, 20 Nov 2020 14:47:13 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:86034cec-f689-4889-8e25-3a8e6b15586c</guid><dc:creator>helsing</dc:creator><description>&lt;p&gt;Hi Wes,&lt;/p&gt;
&lt;p&gt;I am looking into this now. I might have to get back to you after the weekend. &lt;/p&gt;
&lt;p&gt;Best regards,&lt;/p&gt;
&lt;p&gt;Håkon&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>