Floating point exception on nrf9160

RE: Floating point exception on nrf9160

Vidar Berg — Tue, 01 Dec 2020 13:50:14 GMT

Hi Danny,

Are you getting a fault exception then? The FPU exception has to be enabled explicitly by writing to the NVIC registers and it should be disabled by default.

RE: Floating point exception on nrf9160

Danny Zadok — Tue, 01 Dec 2020 13:44:16 GMT

Hi Vidar,

No. I did not enable the FPU exception handler in my app.

I do I enable/disable it? Please let me know if it is enabled.

RE: Floating point exception on nrf9160

Vidar Berg — Tue, 01 Dec 2020 11:27:12 GMT

Hi Danny,

Have you enabled the FPU exception handler in your app? In that case, I think I've misunderstood the problem. I thought the float instruction was causing a fault exception at first. Assuming it's indeed a FPU exception, can you read the control register to check what the reason for the exception is (Floating-point Status Control Register)? Most likely it is going to be the IXC bit, which indicate that the result of a FP computation has been rounded. There is a similar thread about this here: https://devzone.nordicsemi.com/f/nordic-q-a/57519/mask-fpu-ixc-exception

Best regards,

Vidar

RE: Floating point exception on nrf9160

Danny Zadok — Mon, 30 Nov 2020 16:43:28 GMT

Hi Vidar,

No. I do not do floating point operation from multiple threads. Only from one thread.

Besides, I did add this ONFIG_FPU_SHARING=y config parameter, but it did not help.

The only workaround was to disable the compiler optimizations with CONFIG_NO_OPTIMIZATIONS=y

Danny

RE: Floating point exception on nrf9160

Vidar Berg — Thu, 26 Nov 2020 08:59:23 GMT

Hi Danny,

Are you doing float operations from multiple threads by any chance? The help text for CONFIG_FPU says that:

"When this option is enabled, by default, threads may use the floating point registers only in an exclusive manner, and this usually means that only one thread may perform floating point operations.

If it is necessary for multiple threads to perform concurrent floating point operations, the “FPU register sharing” option must be enabled to preserve the floating point registers across context switches."

Please try to build with CONFIG_FPU_SHARING=y and see if it makes any difference.

Best regards,

Vidar

RE: Floating point exception on nrf9160

Danny Zadok — Wed, 25 Nov 2020 07:32:56 GMT

Additional information:

If I disable the compiler optimizations in prj.conf by

CONFIG_NO_OPTIMIZATIONS=y

It stops happening.

But I need the optimizations.

Does any one knows why GCC optimizations causes exceptions?

Thanks

Danny