How to enable parallel trace output?

RE: How to enable parallel trace output?

ovrebekk — Tue, 29 Dec 2020 13:32:59 GMT

At a minimum you would have to set the TRCENA bit in the DEMCR register, as mentioned in the ARMv7-M Architecture Reference Manual.

For ITM tracing there are various configuration registers available, as listed here.

For more details on this I will need to wait for more people to be back over the new year.

Best regards
Torbjørn

RE: How to enable parallel trace output?

Bennet — Tue, 22 Dec 2020 16:33:00 GMT

I am running a simple variation of the blinky example, it is just modified to enable ITM output and to use 2 LEDs to indicate the state of CSPSR and SPPR to ensure that everything is set up correctly. But I can try the bare blinky again.

Would there be some trace output by default if nothing else is configured? Or do I have to send ITM messages or enable ETM trace (no idea how that works) to get something out?

RE: How to enable parallel trace output?

ovrebekk — Tue, 22 Dec 2020 09:55:10 GMT

Thanks for elaborating on what you are trying to do.

What kind of software are you running on the device?

The code triggered by the ENABLE_TRACE define should be enough to get trace running, but there could be issues if you have a SoftDevice running that delays the execution of this code until after the SoftDevice has been initialized.

Are you able to try this with a simple example without any SoftDevice, such as the blinky example, and see if you can get the trace working?

Best regards
Torbjørn

RE: How to enable parallel trace output?

Bennet — Mon, 21 Dec 2020 11:36:46 GMT

To be precise, I want to use https://github.com/orbcode/orbuculum

This project has a subproject called "orbtrace" which uses an FPGA connected to the trace pins. The software also has a TPIU decoder. There are some gdb scripts for STM based chips for enabling the trace output. But nothing for nrf, the developer doesn't know how to do it either.

This isn't specific to that project though, I could also want to use a logic analyzer and feed the result to sigrok for decoding. For this I also need to know how to configure trace.

I'll look into the documentation but would be very grateful for some hints.

What I found so far is that I probably need to set Current_port_size (CSPSR) to width 4 (0x8) to enable all 4 pins. However that doesn't make a difference, there is still only activity on one pin. Edit: it does work if I set

TPI->SPPR = 0x0;

Now I get some voltage on all pins. Capturing trace still doesn't work, but I have yet to figure out whether that is the fault of my configuration or orbtrace.

RE: How to enable parallel trace output?

ovrebekk — Fri, 18 Dec 2020 13:39:19 GMT

Hi Bennet

If I understand you correctly you want to create your own trace debugger rather than getting an off the shelf one?

We don't really have any guides or tutorials showing how to do this, since this is not something our customers normally do.

You would have to start by reading through the relevant ARM specifications, covering the trace modules and the SWD interface:

https://developer.arm.com/documentation/ddi0480/b

Best regards
Torbjørn