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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>Can an internal pull down be enabled for a UARTE RX input?</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/69786/can-an-internal-pull-down-be-enabled-for-a-uarte-rx-input</link><description>Are you able to enable internal pin pulls for UARTE pins, specifically the selected RX pin? 
 On page 490 of the nRF52833 datasheet, footnote &amp;#39;35&amp;#39; states that &amp;quot;High baud rates may require GPIOs to be set as High Drive, see GPIO chapter for more details</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Tue, 22 Dec 2020 22:33:44 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/69786/can-an-internal-pull-down-be-enabled-for-a-uarte-rx-input" /><item><title>RE: Can an internal pull down be enabled for a UARTE RX input?</title><link>https://devzone.nordicsemi.com/thread/286392?ContentTypeID=1</link><pubDate>Tue, 22 Dec 2020 22:33:44 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:7afc906c-da49-4ee0-b41b-4c5ddb31eaaa</guid><dc:creator>srengel</dc:creator><description>&lt;p&gt;Thanks for the quick response Einar!&lt;br /&gt;&lt;br /&gt;I was able to configure the RX input&amp;nbsp;for a pull down during initialization using nrf_gpio_cfg_input() and was able to confirm the functionality that I was going after.&lt;/p&gt;
&lt;p&gt;Cheers!&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Can an internal pull down be enabled for a UARTE RX input?</title><link>https://devzone.nordicsemi.com/thread/286289?ContentTypeID=1</link><pubDate>Tue, 22 Dec 2020 12:45:52 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:a844d631-68c5-41ec-bd3f-1574493254f3</guid><dc:creator>Einar Thorsrud</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;The UART(E) pins can be configured with pull and high drive, there are no restriction in the HW there. Note that if use use the driver you can see&amp;nbsp;the pin configuration in&amp;nbsp;apply_config() in nrfx_uarte.c. That uses&amp;nbsp;nrf_gpio_cfg_input() with&amp;nbsp;NRF_GPIO_PIN_NOPULL for inputs (RXD and CTS) and&amp;nbsp;nrf_gpio_cfg_output() for outputs (TXD and RTS). That means that&amp;nbsp;any configuration you do before would be overwritten. Therefor you need to either modify the driver, or adjust the GPIO configuration after initializing the UARTE driver. You would typically use&amp;nbsp;nrf_gpio_cfg() to write the desired configuration to the PIN_CNF register for each pin where you need to change the config.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>