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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>SPI vs IO interface</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/69938/spi-vs-io-interface</link><description>Hi, 
 Background: I am looking at interfacing nRF21540 (FEM) with nRF52833 (Host) - hoping there&amp;#39;s Zephyr support available for this(?) 
 Question: Product spec for nRF21540 reads “ Control interface via I/O, SPI, or a combination of both ” – I think</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Tue, 19 Jan 2021 07:40:52 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/69938/spi-vs-io-interface" /><item><title>RE: SPI vs IO interface</title><link>https://devzone.nordicsemi.com/thread/289922?ContentTypeID=1</link><pubDate>Tue, 19 Jan 2021 07:40:52 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:9a0781d3-63ae-4df1-ae93-987cec7d4006</guid><dc:creator>Andreas</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;I would avoid routing and thus changing the layout underneath the nRF21540. This will cause mismatch and/or alter the grounding of nRF21540 while that is assembled, which should be avoided to minimize the risk of any surprises down the road.&lt;/p&gt;
&lt;p&gt;I would add a transmission line around the device, something like this:&lt;br /&gt;&lt;img src="https://devzone.nordicsemi.com/resized-image/__size/320x240/__key/communityserver-discussions-components-files/4/pastedimage1611041855053v1.png" alt=" " /&gt;&lt;br /&gt;This way you would mount the two green caps instead of C1 and the new blue cap, to disconnect nRF21540 without any shunt stubs in the RF line. Similarly, if nRF21540 is mounted, the bypass path will not introduce any shunt stubs, the blue cap must still be mounted but if using a rather large value (~10pF or larger) it will not cause any mismatch.&lt;br /&gt;This obviously requires a 4-layer stackup, or more, as the RF paths must have solid ground underneath, the control lines for nRF21540 must then be routed at the bottom layer or similarly far down the stackup.&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Best regards,&lt;br /&gt;Andreas&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI vs IO interface</title><link>https://devzone.nordicsemi.com/thread/289888?ContentTypeID=1</link><pubDate>Mon, 18 Jan 2021 23:53:57 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:36535bf0-024c-4b37-a634-9f5fdf8c0b15</guid><dc:creator>Smart.Enrg</dc:creator><description>&lt;p&gt;Thanks Andreas,&lt;/p&gt;
&lt;p&gt;Another question as I am wrapping up the design, will share for review shortly.&lt;/p&gt;
&lt;p&gt;I am trying to create a configuration where nRF21540 may be BOM called for optional assembly.&lt;br /&gt;For the assembly that doesn&amp;#39;t require FEM - trying to come up with a best way to bypass FEM -&amp;nbsp;&lt;br /&gt;effectively connecting pads 10 and 3 of nRF21540 footprint. Of course, in way that won&amp;#39;t impact &lt;br /&gt;RF performance in any adverse manner.&lt;/p&gt;
&lt;p&gt;Please advise what would be the best way that you recommend to effectively bypass nRF21540&lt;/p&gt;
&lt;p&gt;&lt;img src="https://devzone.nordicsemi.com/resized-image/__size/320x240/__key/communityserver-discussions-components-files/4/pastedimage1611013679155v1.png" alt=" " /&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI vs IO interface</title><link>https://devzone.nordicsemi.com/thread/286851?ContentTypeID=1</link><pubDate>Tue, 29 Dec 2020 13:32:12 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:a1633c48-db3f-4fc0-9147-1e5a3d1fba71</guid><dc:creator>Andreas</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;You can use SPI for control, but there will be a write delay so for real-time operation you should use GPIO control. In this case, the TX_EN and RX_EN pins should be tied to ground. The driver is still in the works so for now I would maybe recommend adding all pins, just in case.&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Best regards,&lt;br /&gt;Andreas&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>