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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>How to Use SPI Interface in a Zephyr sample example?</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/70105/how-to-use-spi-interface-in-a-zephyr-sample-example</link><description>Hi, 
 I am trying to understand how to enable SPI in blinky application provided by Nordic. My intention is to transfer data between the two Nordic development kit running blinky application over SPI. I have enabled SPI with the following details in the</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Tue, 12 Jan 2021 10:05:33 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/70105/how-to-use-spi-interface-in-a-zephyr-sample-example" /><item><title>RE: How to Use SPI Interface in a Zephyr sample example?</title><link>https://devzone.nordicsemi.com/thread/288587?ContentTypeID=1</link><pubDate>Tue, 12 Jan 2021 10:05:33 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:57f84a46-1cdc-40f2-93ff-5f705ddff9f5</guid><dc:creator>H&amp;#229;kon Alseth</dc:creator><description>&lt;p&gt;Hi Ram,&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;I slightly modified the samples, so that it sets up RX and TX transaction on the master side, and increments the first byte in the payload (cycles through ascii &amp;#39;0&amp;#39; to &amp;#39;9&amp;#39;).&lt;/p&gt;
&lt;p&gt;I do not have two nrf52840dk&amp;#39;s at my end at this point, so I&amp;#39;m using a nRF9160-DK as the master, but it should be possible to use nRF52/nRF53/nRF91 with no or little modifications. I tested both examples on a nRF52840 (ie: reversed the SPI roles)&lt;/p&gt;
&lt;p&gt;nRF52840 is the SPIS in my end with the below prints.&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;Master should print like this when properly connected to the slave, and sends once per second (note: it prints in hex)&amp;nbsp;&lt;br /&gt;&lt;pre class="ui-code" data-mode="text"&gt;*** Booting Zephyr OS build v2.4.0-ncs2 ***
SPIM example
IRQ: 0
Transfer completed
Received: 35 36 37 38 39 30 31 32 33 34 0 0
IRQ: 0
Transfer completed
Received: 35 36 37 38 39 30 31 32 33 34 0 0&lt;/pre&gt;&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Slave should print this:&lt;/p&gt;
&lt;p&gt;&lt;pre class="ui-code" data-mode="text"&gt;*** Booting Zephyr OS build v2.4.0-ncs2 ***
SPIS example
ISR 0
ISR 1
bytes rx: 11
7234567890ISR 0
ISR 1
bytes rx: 11
8234567890ISR 0
ISR 1
bytes rx: 11
9234567890ISR 0&lt;/pre&gt;&lt;/p&gt;
&lt;p&gt;Here you should see that the first byte increments.&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;The actual bus communication should look like this (here sampled with a logic analyzer from Saleae):&lt;/p&gt;
&lt;p&gt;&lt;img src="https://devzone.nordicsemi.com/resized-image/__size/320x240/__key/communityserver-discussions-components-files/4/pastedimage1610445633338v1.png" alt=" " /&gt;&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Here are my projects:&amp;nbsp;&lt;/p&gt;
&lt;p&gt;&lt;a href="https://devzone.nordicsemi.com/cfs-file/__key/communityserver-discussions-components-files/4/nrfx_5F00_spi_5F00_master.zip"&gt;devzone.nordicsemi.com/.../nrfx_5F00_spi_5F00_master.zip&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;&lt;a href="https://devzone.nordicsemi.com/cfs-file/__key/communityserver-discussions-components-files/4/nrfx_5F00_spi_5F00_slave.zip"&gt;devzone.nordicsemi.com/.../nrfx_5F00_spi_5F00_slave.zip&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;If you, after flashing and connecting SPIS -&amp;gt; SPIM, still do not receive or send data as expected, could you please use a logic analyzer to see if there&amp;#39;s anything happening on the SPI pins?&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Kind regards,&lt;/p&gt;
&lt;p&gt;Håkon&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: How to Use SPI Interface in a Zephyr sample example?</title><link>https://devzone.nordicsemi.com/thread/288456?ContentTypeID=1</link><pubDate>Mon, 11 Jan 2021 15:58:58 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:9322c000-ccc3-41e0-abe2-2431d29b0042</guid><dc:creator>RAS_ID</dc:creator><description>&lt;p&gt;Hi Hakon,&lt;/p&gt;
&lt;p&gt;Thanks for your prompt reply!&lt;/p&gt;
&lt;p&gt;I have updated the pin ordering in the configuration on both sides. I have also changed the number of bytes to send.&lt;/p&gt;
&lt;p&gt;Is the setup for the event handler correct? I am ready to share my screen with you if you have a few minutes?&lt;/p&gt;
&lt;p&gt;Let me know.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Thanks&lt;/p&gt;
&lt;p&gt;Ram&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: How to Use SPI Interface in a Zephyr sample example?</title><link>https://devzone.nordicsemi.com/thread/288336?ContentTypeID=1</link><pubDate>Mon, 11 Jan 2021 10:38:04 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:fa6bc018-9eda-4679-8ff3-51e2f50ffbae</guid><dc:creator>H&amp;#229;kon Alseth</dc:creator><description>&lt;p&gt;Hi Ram,&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;1Ordering of your pins are incorrect when you&amp;#39;re configuring:&lt;/p&gt;
&lt;p&gt;static nrfx_spis_config_t spis_config = NRFX_SPIS_DEFAULT_CONFIG(APP_SPIS_CS_PIN, &lt;br /&gt; APP_SPIS_MISO_PIN,APP_SPIS_MOSI_PIN,APP_SPIS_SCK_PIN);&lt;/p&gt;
&lt;p&gt;static nrfx_spim_config_t spim_config = NRFX_SPIM_DEFAULT_CONFIG(APP_SPIM_CS_PIN, &lt;br /&gt; APP_SPIM_MISO_PIN,APP_SPIM_MOSI_PIN,APP_SPIM_SCK_PIN);&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Given that its equal on both sides, it should work, but be aware that the correct ordering according to the helper-macro should be:&lt;/p&gt;
&lt;div&gt;
&lt;div&gt;&lt;span&gt;NRFX_SPIS_DEFAULT_CONFIG&lt;/span&gt;&lt;span&gt;(&lt;/span&gt;&lt;span&gt;APP_SPIS_SCK_PIN&lt;/span&gt;&lt;span&gt;, &lt;/span&gt;&lt;span&gt;APP_SPIS_MOSI_PIN&lt;/span&gt;&lt;span&gt;, &lt;/span&gt;&lt;span&gt;APP_SPIS_MISO_PIN&lt;/span&gt;&lt;span&gt;, &lt;/span&gt;&lt;span&gt;APP_SPIS_CS_PIN&lt;/span&gt;&lt;span&gt;);&lt;/span&gt;&lt;/div&gt;
&lt;/div&gt;
&lt;div&gt;
&lt;div&gt;&lt;span&gt;NRFX_SPIM_DEFAULT_CONFIG&lt;/span&gt;&lt;span&gt;(&lt;/span&gt;&lt;span&gt;APP_SPIM_SCK_PIN&lt;/span&gt;&lt;span&gt;, &lt;/span&gt;&lt;span&gt;APP_SPIM_MOSI_PIN&lt;/span&gt;&lt;span&gt;, &lt;/span&gt;&lt;span&gt;APP_SPIM_MISO_PIN&lt;/span&gt;&lt;span&gt;, &lt;/span&gt;&lt;span&gt;APP_SPIM_CS_PIN&lt;/span&gt;&lt;span&gt;);&lt;/span&gt;&lt;/div&gt;
&lt;/div&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;The SPIM implementation seems to send 254 bytes, you should restrict this to the max. size of the m_tx_buf.&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Have you scoped the pins using a logic analyzer to see if everything is setup correctly on a hardware level?&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Kind regards,&lt;/p&gt;
&lt;p&gt;håkon&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: How to Use SPI Interface in a Zephyr sample example?</title><link>https://devzone.nordicsemi.com/thread/288299?ContentTypeID=1</link><pubDate>Mon, 11 Jan 2021 06:58:45 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:756fa914-d8bd-46e8-9fc5-e75041bf9e5c</guid><dc:creator>RAS_ID</dc:creator><description>&lt;p&gt;Hi Hakon,&lt;/p&gt;
&lt;p&gt;Thanks for your reply!&lt;/p&gt;
&lt;p&gt;I have decided to use &lt;strong&gt;nrfx SPI driver&lt;/strong&gt; at this time instead of Zephyr SPI port, and I have created two simple projects (using minimal) to run on two separate nRF52840dk: one for the master and the other for the slave. I start the slave and then start the master. The interrupt handler is called on the slave but the rx_amount is showing 0. I also noticed that interrupt handler on master is called but nrfx_spim_xfer() returns an error code. The prj.conf files for the two projects and the main.c are attached here.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Slave:&lt;/p&gt;
&lt;p&gt;CONFIG_SPI=n&lt;br /&gt;CONFIG_NRFX_SPIS=y&lt;br /&gt;CONFIG_NRFX_SPIS1=y&lt;/p&gt;
&lt;p&gt;CONFIG_MAIN_STACK_SIZE=4096&lt;/p&gt;
&lt;p&gt;---------------------------------------------------&lt;/p&gt;
&lt;p&gt;Master:&lt;/p&gt;
&lt;p&gt;CONFIG_SPI=n&lt;br /&gt;CONFIG_NRFX_SPIM=y&lt;br /&gt;CONFIG_NRFX_SPIM1=y&lt;br /&gt;CONFIG_MAIN_STACK_SIZE=4096&lt;/p&gt;
&lt;p&gt;&lt;pre class="ui-code" data-mode="c_cpp"&gt;//main on SPI master
#include &amp;quot;nrfx_spim.h&amp;quot;
#include &amp;quot;nrfx_gpiote.h&amp;quot;
#include &amp;quot;drivers/nrfx_errors.h&amp;quot;
#include &amp;lt;sys/printk.h&amp;gt;
#include &amp;lt;string.h&amp;gt;

#define SPI_INSTANCE  1
static const nrfx_spim_t spim = NRFX_SPIM_INSTANCE(SPI_INSTANCE);

#define APP_SPIM_CS_PIN     0x10

#define APP_SPIM_SCK_PIN    0x1F
#define APP_SPIM_MISO_PIN   0x28
#define APP_SPIM_MOSI_PIN   0x1E

#define NRFX_CUSTOM_ERROR_CODES 0 //used in nrfx_errors.h

static nrfx_spim_config_t spim_config = NRFX_SPIM_DEFAULT_CONFIG(APP_SPIM_CS_PIN,   
                                     APP_SPIM_MISO_PIN,APP_SPIM_MOSI_PIN,APP_SPIM_SCK_PIN);
 
#define TEST_STRING &amp;quot;1234567890&amp;quot;
static uint8_t       m_tx_buf[] = TEST_STRING;
static uint8_t       m_rx_buf[sizeof(TEST_STRING) + 1];
static const uint8_t m_length = sizeof(m_tx_buf);

static volatile bool spim_xfer_done; /**&amp;lt; Flag used to indicate that SPIM instance completed the transfer. */

static void manual_isr_setup()
{
    IRQ_DIRECT_CONNECT(SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQn, 0, nrfx_spim_1_irq_handler, 0);
    irq_enable(SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQn);
}
 
void spim_event_handler(nrfx_spim_evt_t const * p_event,
                       void * p_context)
{
    if(p_event-&amp;gt;type == NRFX_SPIM_EVENT_DONE)
    {
        spim_xfer_done = true;
        printk(&amp;quot;Transfer completed.&amp;quot;);
    }
}
 
void main(void)
{
    printk(&amp;quot;SPIM example&amp;quot;);
    nrfx_spim_xfer_desc_t xfer_desc = NRFX_SPIM_XFER_TX(m_tx_buf, 254);
 
    if (NRFX_SUCCESS != nrfx_spim_init(&amp;amp;spim, &amp;amp;spim_config, spim_event_handler, NULL))
    {
      printk(&amp;quot;Init Failed&amp;quot;);
      return;
    }

    manual_isr_setup();
 
//   while (1)
//    {
        // Reset rx buffer and transfer done flag
        memset(m_rx_buf, 0, m_length);
        spim_xfer_done = false;
 
        nrfx_err_t err_code = nrfx_spim_xfer(&amp;amp;spim, &amp;amp;xfer_desc, 0);
 
	if (err_code == NRFX_ERROR_BUSY)
	{
		printk(&amp;quot;SPI busy&amp;quot;);
	}
        
	else
	{
		printk(&amp;quot;Error code = %d&amp;quot;,err_code);
	}
        
 
        while (!spim_xfer_done)
        {
            __WFE();
        }
 
//        nrfx_delay_ms(1000);
//    }
}

//main on SPI slave
#include &amp;quot;nrfx_spis.h&amp;quot;
#include &amp;quot;nrfx_gpiote.h&amp;quot;
#include &amp;lt;sys/printk.h&amp;gt;

#include &amp;lt;string.h&amp;gt;
#include &amp;lt;irq.h&amp;gt;

#define SPIS_INSTANCE 1 /**&amp;lt; SPIS instance index. */
static const nrfx_spis_t spis = NRFX_SPIS_INSTANCE(SPIS_INSTANCE);/**&amp;lt; SPIS instance. */

#define APP_SPIS_CS_PIN     0x10

#define APP_SPIS_SCK_PIN    0x1F
#define APP_SPIS_MISO_PIN   0x28
#define APP_SPIS_MOSI_PIN   0x1E

static nrfx_spis_config_t spis_config = NRFX_SPIS_DEFAULT_CONFIG(APP_SPIS_CS_PIN,   
                                     APP_SPIS_MISO_PIN,APP_SPIS_MOSI_PIN,APP_SPIS_SCK_PIN);
#define TEST_STRING &amp;quot;5678901234&amp;quot;
static uint8_t       m_tx_buf[] = TEST_STRING;           /**&amp;lt; TX buffer. */
static uint8_t       m_rx_buf[sizeof(TEST_STRING) + 1];    /**&amp;lt; RX buffer. */

static const uint8_t m_length = sizeof(m_tx_buf);        /**&amp;lt; Transfer length. */


static volatile bool spis_xfer_done; /**&amp;lt; Flag used to indicate that SPIS instance completed the transfer. */

static void manual_isr_setup()
{
    IRQ_DIRECT_CONNECT(SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQn, 0, nrfx_spis_1_irq_handler, 0);
    irq_enable(SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQn);
}

/**
 * @brief SPIS user event handler.
 *
 * @param event
 */
void spis_event_handler(nrfx_spis_evt_t * event, 
                        void * p_context)
{
    if (event-&amp;gt;evt_type == NRFX_SPIS_XFER_DONE)
    {
      spis_xfer_done = true;
      printk(&amp;quot;Transfer completed. Received: %d&amp;quot;,event-&amp;gt;rx_amount);
    }
}

int main(void)
{
    // Enable the constant latency sub power mode to minimize the time it takes
    // for the SPIS peripheral to become active after the CSN line is asserted
    // (when the CPU is in sleep mode).
    NRF_POWER-&amp;gt;TASKS_CONSTLAT = 1;

    printk(&amp;quot;SPIS example&amp;quot;);

    
    if (NRFX_SUCCESS != nrfx_spis_init(&amp;amp;spis, &amp;amp;spis_config, spis_event_handler, NULL))
    {
      printk(&amp;quot;Init Failed&amp;quot;);
      return 0;
    }

    manual_isr_setup();

    while (1)
    {
        memset(m_rx_buf, 0, m_length);
        spis_xfer_done = false;

        if (NRFX_SUCCESS != nrfx_spis_buffers_set(&amp;amp;spis, m_tx_buf, m_length, m_rx_buf, m_length))
        {
          printk(&amp;quot;Receive Failed&amp;quot;);
          return 0;
        }

        while (!spis_xfer_done)
        {
            __WFE();
        }
    }
}
&lt;/pre&gt;&lt;/p&gt;
&lt;p&gt;*** Booting Zephyr OS build v2.4.0-ncs1-3-gfe00929d308d ***&lt;br /&gt;&lt;strong&gt;SPIM&lt;/strong&gt; example Error ransfer completed.code = 195887104 (this is due to coding issue but this is NRFX_SUCCESS)&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;*** Booting Zephyr OS build v2.4.0-ncs1-3-gfe00929d308d ***&lt;br /&gt;&lt;strong&gt;SPIS&lt;/strong&gt; example Transfer completed. Received: 0&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; It means slave is seeing the interrupt without any data.&lt;/p&gt;
&lt;p&gt;Could you please see the .config and main files and guide me what is missing for slave not reading the data?&amp;nbsp;&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;Thanks,&lt;/p&gt;
&lt;p&gt;Ram&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: How to Use SPI Interface in a Zephyr sample example?</title><link>https://devzone.nordicsemi.com/thread/287791?ContentTypeID=1</link><pubDate>Wed, 06 Jan 2021 16:43:46 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:485470e3-3bce-43d3-aa4e-21eb43a86d4e</guid><dc:creator>H&amp;#229;kon Alseth</dc:creator><description>&lt;p&gt;Hi Ram,&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
[quote user="RAS_ID"]&lt;p&gt;Thanks for your detailed reply! I really appreciate it! I have the following details from other Nordic posts.&lt;/p&gt;
&lt;p&gt;1. In&amp;nbsp;&lt;a href="https://devzone.nordicsemi.com/f/nordic-q-a/69269/issues-with-implementing-spi-slave-on-nrf9160dk/285345#285345"&gt;https://devzone.nordicsemi.com/f/nordic-q-a/69269/issues-with-implementing-spi-slave-on-nrf9160dk/285345#285345&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;you have replied that&amp;nbsp;&lt;strong&gt;&amp;quot;The problem is that the nrfx_spis and zephyr&amp;#39;s spi slave do not play well together, so you have to only have one of these enabled to be able to use the SPIS properly.&lt;/strong&gt;&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;&amp;nbsp;As your project is setup now, the zephyr spi driver will be initialized &amp;quot;post kernel&amp;quot; (see here:&amp;nbsp;&lt;a href="https://github.com/nrfconnect/sdk-zephyr/blob/master/drivers/spi/spi_nrfx_spis.c#L290-L297"&gt;https://github.com/nrfconnect/sdk-zephyr/blob/master/drivers/spi/spi_nrfx_spis.c#L290-L297&lt;/a&gt;), and before main() is called. &lt;/strong&gt;&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;This means that the spis_nrfx_spis.c implementation will then claim the SPIS3 peripheral before you can via the nrfx_spis API in main.&amp;quot;&lt;/strong&gt;&lt;/p&gt;
&lt;p&gt;2. Also, you have written in&amp;nbsp;&lt;a href="https://devzone.nordicsemi.com/f/nordic-q-a/69034/nrf52840-spi-slave-configuration-event_handler"&gt;https://devzone.nordicsemi.com/f/nordic-q-a/69034/nrf52840-spi-slave-configuration-event_handler&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;&amp;quot;&lt;span&gt;The zephyr spis driver assumes that you use a dedicated thread, and use the k_poll functionality (signalled from the evt handler)&amp;quot;, and&lt;/span&gt;&lt;/strong&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;&amp;quot;&lt;strong&gt;If you use nrfx_spis (CONFIG_NRFX_SPIS=y) directly; you can do this using the approach with a event_handler.&lt;/strong&gt;&amp;quot;&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;&lt;/span&gt;&lt;span&gt;3. And, Torbjorn has written in&amp;nbsp;&lt;a href="https://devzone.nordicsemi.com/f/nordic-q-a/56857/understanding-spi-with-easy-dma"&gt;https://devzone.nordicsemi.com/f/nordic-q-a/56857/understanding-spi-with-easy-dma&lt;/a&gt;&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;There is no need to enable NRFX_SPIM_ENABLED or NRFX_SPI_ENABLED. As long as you enable &lt;strong&gt;SPI_ENABLED&lt;/strong&gt;, and enable &lt;strong&gt;SPIx_USE_EASY_DMA&lt;/strong&gt; for any instance that you use, the nrfx_spim driver will be enabled automatically, and DMA will be used.&lt;/p&gt;
&lt;p&gt;&lt;span&gt;If you want SPI slave you should enable SPIS_ENABLED&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;Please note that there is no choice of DMA or not when using SPI slave, as the SPI slave peripheral&amp;nbsp;had DMA from the start.&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;Note: I am not sure if this is applicable to SPI in nRF Connect or not.&lt;/strong&gt;&lt;/p&gt;[/quote]
&lt;p&gt;&amp;nbsp;Torbjørn is talking about the nrfx integration in the nRF5 SDK, by configuring the SPI/SPIM module using the sdk_config.h.&lt;/p&gt;
&lt;p&gt;On the nRF52-series devices, in addition to the NRF_SPIM (DMA capable) module, there&amp;#39;s a legacy NRF_SPI module, which is not DMA capable. The DMA mentions here are towards backwards compatibility.&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;nRF9160 does not have the legacy NRF_SPI module, so you&amp;#39;ll have to use a DMA capable one here.&amp;nbsp;&amp;nbsp;&lt;/p&gt;
[quote user="RAS_ID"]&lt;p&gt;&lt;span&gt;So, if I want to use easyDMA without a dedicated thread, I should set&lt;/span&gt;&lt;/p&gt;
&lt;p style="padding-left:30px;"&gt;&lt;span&gt;&lt;strong&gt;CONFIG_NRFX_SPIS=y&lt;/strong&gt;&lt;/span&gt;&lt;/p&gt;
&lt;p style="padding-left:30px;"&gt;&lt;span&gt;&lt;strong&gt;CONFIG_NRFX_SPIS3=y&lt;/strong&gt;&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;&lt;/span&gt;&lt;span&gt;Form the documentation, CONFIG_SPI_0_NRF_SPIS enables nRF SPI slave with EasyDMA on port-0. It is indirectly enabled with SPI_SLAVE &amp;amp;&amp;amp; SPI_NRFX &amp;amp;&amp;amp; SPI. It means that all the 3 shall be set to y in my configuration.&amp;nbsp;&lt;/span&gt;&lt;/p&gt;[/quote]
&lt;p&gt;&amp;nbsp;The CONFIG_NRFX_* configs allow you to directly access the nrfx driver. This then omits DTS and other configs towards the zephyr SPI component. You should then set CONFIG_SPI=n to avoid zephyr potentially &amp;quot;grabbing&amp;quot; your NRF_SPIx&amp;nbsp;interrupt vector, which it will do if you enable the same instance as you try to use with nrfx_spi*.&lt;/p&gt;
&lt;p&gt;If you do not plant to use any of the sensor drivers or other functions related to zephyrs driver, you can&amp;nbsp;set CONFIG_NRFX_SPIS=y and include nrfx_spis.h in your application, and setup the driver directly, similar to how its done in the nRF5 SDK example examples/peripheral/spis.&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Note: when using NRFX drivers, you have to manually link the interrupt vector, similar to this:&lt;/p&gt;
&lt;p&gt;&lt;a href="https://github.com/Rallare/fw-nrfconnect-nrf/blob/nrf9160_samples/samples/nrf9160/nrfx_timed_signal/src/main.c#L128-L132"&gt;https://github.com/Rallare/fw-nrfconnect-nrf/blob/nrf9160_samples/samples/nrf9160/nrfx_timed_signal/src/main.c#L128-L132&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Kind regards,&lt;/p&gt;
&lt;p&gt;Håkon&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
[quote user="RAS_ID"]Could you please throw some light on the configuration for the SPI master and SPI slave with DMA and without DMA without a dedicated thread?[/quote]
&lt;p&gt;&amp;nbsp;You have to use DMA on a hardware level.&lt;/p&gt;
&lt;p&gt;If you want to use the SPI modules with any of the drivers/sensors in the zephyr tree, you should look at using the zephyr spi driver. However, if not, you can choose freely between the zephyr SPI or use nrfx directly.&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: How to Use SPI Interface in a Zephyr sample example?</title><link>https://devzone.nordicsemi.com/thread/287637?ContentTypeID=1</link><pubDate>Wed, 06 Jan 2021 08:09:34 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:71691655-0e40-4550-8783-c05addcc1a28</guid><dc:creator>H&amp;#229;kon Alseth</dc:creator><description>&lt;p&gt;Hi Ram,&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
[quote user="RAS_ID"]&lt;p&gt;One more question. What are these 3 configurations?&lt;/p&gt;
&lt;p&gt;CONFIG_NRFX_SPI&lt;/p&gt;
&lt;p&gt;CONFIG_NRFX_SPIM&lt;/p&gt;
&lt;p&gt;CONFIG_NRFX_SPIS&lt;/p&gt;[/quote]
&lt;p&gt;&amp;nbsp;This brings in the nrfx driver, which the zephyr spi port driver uses:&lt;/p&gt;
&lt;p&gt;&lt;a href="https://github.com/nrfconnect/sdk-hal_nordic/blob/master/CMakeLists.txt#L66"&gt;https://github.com/nrfconnect/sdk-hal_nordic/blob/master/CMakeLists.txt#L66&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Kind regards,&lt;/p&gt;
&lt;p&gt;Håkon&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: How to Use SPI Interface in a Zephyr sample example?</title><link>https://devzone.nordicsemi.com/thread/287622?ContentTypeID=1</link><pubDate>Wed, 06 Jan 2021 07:08:10 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:dc8d2b66-bac5-45ec-80d0-62bfb7f2e9fd</guid><dc:creator>RAS_ID</dc:creator><description>&lt;p&gt;Hi Hakon,&lt;/p&gt;
&lt;p&gt;One more question. What are these 3 configurations?&lt;/p&gt;
&lt;p&gt;CONFIG_NRFX_SPI&lt;/p&gt;
&lt;p&gt;CONFIG_NRFX_SPIM&lt;/p&gt;
&lt;p&gt;CONFIG_NRFX_SPIS&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;Thanks,&lt;/p&gt;
&lt;p&gt;Ram&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: How to Use SPI Interface in a Zephyr sample example?</title><link>https://devzone.nordicsemi.com/thread/287589?ContentTypeID=1</link><pubDate>Tue, 05 Jan 2021 21:29:39 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:00415c39-f0af-40a7-b16c-53e6e1825802</guid><dc:creator>RAS_ID</dc:creator><description>&lt;p&gt;Hi Hakon,&lt;/p&gt;
&lt;p&gt;Thanks for your detailed reply! I really appreciate it! I have the following details from other Nordic posts.&lt;/p&gt;
&lt;p&gt;1. In&amp;nbsp;&lt;a href="https://devzone.nordicsemi.com/f/nordic-q-a/69269/issues-with-implementing-spi-slave-on-nrf9160dk/285345#285345"&gt;https://devzone.nordicsemi.com/f/nordic-q-a/69269/issues-with-implementing-spi-slave-on-nrf9160dk/285345#285345&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;you have replied that&amp;nbsp;&lt;strong&gt;&amp;quot;The problem is that the nrfx_spis and zephyr&amp;#39;s spi slave do not play well together, so you have to only have one of these enabled to be able to use the SPIS properly.&lt;/strong&gt;&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;&amp;nbsp;As your project is setup now, the zephyr spi driver will be initialized &amp;quot;post kernel&amp;quot; (see here:&amp;nbsp;&lt;a href="https://github.com/nrfconnect/sdk-zephyr/blob/master/drivers/spi/spi_nrfx_spis.c#L290-L297"&gt;https://github.com/nrfconnect/sdk-zephyr/blob/master/drivers/spi/spi_nrfx_spis.c#L290-L297&lt;/a&gt;), and before main() is called. &lt;/strong&gt;&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;This means that the spis_nrfx_spis.c implementation will then claim the SPIS3 peripheral before you can via the nrfx_spis API in main.&amp;quot;&lt;/strong&gt;&lt;/p&gt;
&lt;p&gt;2. Also, you have written in&amp;nbsp;&lt;a href="https://devzone.nordicsemi.com/f/nordic-q-a/69034/nrf52840-spi-slave-configuration-event_handler"&gt;https://devzone.nordicsemi.com/f/nordic-q-a/69034/nrf52840-spi-slave-configuration-event_handler&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;&amp;quot;&lt;span&gt;The zephyr spis driver assumes that you use a dedicated thread, and use the k_poll functionality (signalled from the evt handler)&amp;quot;, and&lt;/span&gt;&lt;/strong&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;&amp;quot;&lt;strong&gt;If you use nrfx_spis (CONFIG_NRFX_SPIS=y) directly; you can do this using the approach with a event_handler.&lt;/strong&gt;&amp;quot;&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;&lt;/span&gt;&lt;span&gt;3. And, Torbjorn has written in&amp;nbsp;&lt;a href="https://devzone.nordicsemi.com/f/nordic-q-a/56857/understanding-spi-with-easy-dma"&gt;https://devzone.nordicsemi.com/f/nordic-q-a/56857/understanding-spi-with-easy-dma&lt;/a&gt;&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;There is no need to enable NRFX_SPIM_ENABLED or NRFX_SPI_ENABLED. As long as you enable &lt;strong&gt;SPI_ENABLED&lt;/strong&gt;, and enable &lt;strong&gt;SPIx_USE_EASY_DMA&lt;/strong&gt; for any instance that you use, the nrfx_spim driver will be enabled automatically, and DMA will be used.&lt;/p&gt;
&lt;p&gt;&lt;span&gt;If you want SPI slave you should enable SPIS_ENABLED&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;Please note that there is no choice of DMA or not when using SPI slave, as the SPI slave peripheral&amp;nbsp;had DMA from the start.&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;Note: I am not sure if this is applicable to SPI in nRF Connect or not.&lt;/strong&gt;&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;&lt;/strong&gt;&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;My questions:&lt;/strong&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;&lt;/span&gt;&lt;span&gt;So, if I want to use easyDMA without a dedicated thread, I should set&lt;/span&gt;&lt;/p&gt;
&lt;p style="padding-left:30px;"&gt;&lt;span&gt;&lt;strong&gt;CONFIG_NRFX_SPIS=y&lt;/strong&gt;&lt;/span&gt;&lt;/p&gt;
&lt;p style="padding-left:30px;"&gt;&lt;span&gt;&lt;strong&gt;CONFIG_NRFX_SPIS3=y&lt;/strong&gt;&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;&lt;/span&gt;&lt;span&gt;Form the documentation, CONFIG_SPI_0_NRF_SPIS enables nRF SPI slave with EasyDMA on port-0. It is indirectly enabled with SPI_SLAVE &amp;amp;&amp;amp; SPI_NRFX &amp;amp;&amp;amp; SPI. It means that all the 3 shall be set to y in my configuration.&amp;nbsp;&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;Do I need to set&amp;nbsp;CONFIG_SPI_0_NRF_SPIS=y?&lt;/strong&gt;&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;&lt;/strong&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;There are so many configuration available to use SPI. &lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;Could you please throw some light on the configuration for the SPI master and SPI slave with DMA and without DMA without a dedicated thread?&lt;/strong&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;Thanks,&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;Ram&lt;/span&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: How to Use SPI Interface in a Zephyr sample example?</title><link>https://devzone.nordicsemi.com/thread/287516?ContentTypeID=1</link><pubDate>Tue, 05 Jan 2021 13:18:00 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:856718bd-494e-45e3-b45c-27e9a730aa06</guid><dc:creator>H&amp;#229;kon Alseth</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
[quote user=""]&lt;p&gt;I see that DEVICE_INIT() in main.c and&amp;nbsp; DEVICE_AND_API_INIT(1) in spi_nrfx_spi.c do all the initialization based on the board dts file. And, I could use spi_read(), spi_write(),&amp;nbsp;spi_transceive() as appropriate to send/receive data thru SPI interface.&lt;/p&gt;
&lt;p&gt;Is my understanding correct?&amp;nbsp;&lt;/p&gt;[/quote]
&lt;p&gt;&amp;nbsp;Yes, this correct when looking at the driver model in zephyr. Its ofcourse a bit more complex than this (see here: &lt;a href="https://docs.zephyrproject.org/latest/reference/drivers/index.html"&gt;https://docs.zephyrproject.org/latest/reference/drivers/index.html&lt;/a&gt;), but this is a good overview.&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Related to SPIM vs SPIS, there&amp;#39;s some information here that might be of interest (DTS property naming can be confusing on SPIM/SPIS):&lt;/p&gt;
&lt;p&gt;&lt;a href="https://devzone.nordicsemi.com/f/nordic-q-a/69269/issues-with-implementing-spi-slave-on-nrf9160dk/285345#285345"&gt;https://devzone.nordicsemi.com/f/nordic-q-a/69269/issues-with-implementing-spi-slave-on-nrf9160dk/285345#285345&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;There&amp;#39;s an example specific to nrf5340 here:&lt;/p&gt;
&lt;p&gt;&lt;a href="https://devzone.nordicsemi.com/f/nordic-q-a/67065/how-to-configure-and-setup-an-spi-device-to-nrf5340"&gt;https://devzone.nordicsemi.com/f/nordic-q-a/67065/how-to-configure-and-setup-an-spi-device-to-nrf5340&lt;/a&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;But, you can remove this line in CMakeLists.txt to allow configuring for other boards:&lt;/p&gt;
&lt;p&gt;&lt;pre class="ui-code" data-mode="text"&gt;# remove these lines from CMakeLists.txt to build for other boards
set(NRF_SUPPORTED_BOARDS
  nrf5340pdk_nrf5340_cpuapp
  )&lt;/pre&gt;&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Then create your own $(BOARD).overlay file with your wanted configuration.&lt;/p&gt;
&lt;p&gt;Note that the sample lacks CSN pin handling.&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Kind regards,&lt;/p&gt;
&lt;p&gt;Håkon&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>