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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>nRF52832 DCDC is constantly active. (Errata 63 ?)</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/70108/nrf52832-dcdc-is-constantly-active-errata-63</link><description>Hi 
 I have 2 identical PCB just out of production - same FW - one is drawing higher current (about 600uA). 
 The issue is found in mass production and about 1% is having higher current. 
 So this is quite urgent. 
 
 My design is based on nRF52832 product</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Wed, 06 Jan 2021 06:58:55 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/70108/nrf52832-dcdc-is-constantly-active-errata-63" /><item><title>RE: nRF52832 DCDC is constantly active. (Errata 63 ?)</title><link>https://devzone.nordicsemi.com/thread/287620?ContentTypeID=1</link><pubDate>Wed, 06 Jan 2021 06:58:55 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:98b09af5-63a5-4d09-9eb6-f9d87cc8d6d5</guid><dc:creator>GoodOld</dc:creator><description>&lt;p&gt;Thanks a lot for the answer. I think you are right, that the problem is something external to the chip. I asked the factory to take a good and a &amp;#39;bad&amp;#39; board and switch the nRF chip on those. So the nRF chip from the good board is solderet on the &amp;#39;bad&amp;#39; and vise-versa. After the de/re-soldering process - both boards were good ! .&lt;/p&gt;
&lt;p&gt;So the nRF chip is not causing the problems we see. Please close this case. :-)&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: nRF52832 DCDC is constantly active. (Errata 63 ?)</title><link>https://devzone.nordicsemi.com/thread/287570?ContentTypeID=1</link><pubDate>Tue, 05 Jan 2021 18:26:59 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:97746b9d-66ba-4b8e-9d84-66487bfb09b9</guid><dc:creator>hmolesworth</dc:creator><description>&lt;p&gt;I looked but don&amp;#39;t see the threshold for auto switching from DC-DC to LDO; I wonder if there is a component tolerance issue on the DC-DC inductor and capacitor on the bad boards. A pain, but could move those components from a good board to a bad board and see if the issue moves with the components. The passive drain might mean the boards are close to the DC-DC/LDO changeover level.&lt;/p&gt;
&lt;p&gt;Maybe also try writing to the &lt;em&gt;TASKS_LOWPWR&lt;/em&gt; register; that is supposed to be the default, but since these registers are write-only it can&amp;#39;t be easily checked. I don&amp;#39;t think that would be 600uA, however.&lt;/p&gt;
&lt;p&gt;&lt;em&gt;In constant latency mode the CPU wakeup latency and the PPI task response will be constant and kept at&amp;nbsp;a minimum. This is secured by forcing a set of base resources on while in sleep. The advantage of having&amp;nbsp;a constant and predictable latency will be at the cost of having increased power consumption. The constant&amp;nbsp;latency mode is selected by triggering the CONSTLAT task.&amp;nbsp;In low power mode the automatic power management system, described in System ON mode on page&amp;nbsp;80, ensures the most efficient supply option is chosen to save the most power. The advantage of having&amp;nbsp;the lowest power&amp;nbsp; possible will be at the cost of having varying CPU wakeup latency and PPI task response.&amp;nbsp;The low power mode is selected by triggering the LOWPWR task.&amp;nbsp;When the system enters System ON mode, it will, by default, reside in the low power sub-power mode&lt;/em&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: nRF52832 DCDC is constantly active. (Errata 63 ?)</title><link>https://devzone.nordicsemi.com/thread/287448?ContentTypeID=1</link><pubDate>Tue, 05 Jan 2021 09:59:44 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:f8f9a9bf-2355-4c4f-965b-9a9329e9d0df</guid><dc:creator>GoodOld</dc:creator><description>&lt;p&gt;Correction -&amp;nbsp;sd_power_dcdc_mode_set(NRF_POWER_DCDC_DISABLE); - does in fact turn the DCDC off. When I do that I measure same power consumption on both PCB.&lt;/p&gt;
&lt;p&gt;HOWEVER ... as the overall power consumption is higher using only the LDO. This does not solve my problem.&lt;/p&gt;
&lt;p&gt;I still need to know if there could be a fix or workaround for the issue that the DCDC in some cases does not get disabled when power consumption is low.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>