what's timing requirement of GPIOE detect rising/fall edge?

RE: what's timing requirement of GPIOE detect rising/fall edge?

wen jin zhang — Tue, 19 May 2015 00:52:17 GMT

sorry! I did not remember how much changes in NRF_GPIO->PIN_CNF[]. but this config working for our board. detect the RISE Event.

NRF_GPIO->PIN_CNF[zx] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
                        | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
                        | (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
                        | (GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos)
                        | (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);

NRF_GPIOTE->CONFIG[2] = (GPIOTE_CONFIG_MODE_Event << GPIOTE_CONFIG_MODE_Pos)
                        | ((uint32_t)zx    << GPIOTE_CONFIG_PSEL_Pos)
                        | ((uint32_t)GPIOTE_CONFIG_POLARITY_LoToHi << GPIOTE_CONFIG_POLARITY_Pos)
                        | ((uint32_t)GPIOTE_CONFIG_OUTINIT_Low << GPIOTE_CONFIG_OUTINIT_Pos);

appreciate your help!

RE: what's timing requirement of GPIOE detect rising/fall edge?

Susheel Nuguru — Mon, 18 May 2015 09:55:30 GMT

does the Sense enable cause problem with the pin when you connected it with GPIOTE? This setting must have been ignored, why didn't it.

RE: what's timing requirement of GPIOE detect rising/fall edge?

wen jin zhang — Mon, 18 May 2015 09:05:35 GMT

Thank for your help! solved the problem by set the GPIO_PIN_CNF_SENSE_Disabled in NRF_GPIO->PIN_CNF[].

RE: what's timing requirement of GPIOE detect rising/fall edge?

Susheel Nuguru — Mon, 18 May 2015 07:08:25 GMT

Yes, that is true, my apologies, only input connect settings from GPIO settings will still be in effect and others ignored. Ignore my comment about the Sense mechanism from GPIO pin setting but my comment on sampling is still valid that it should happen fast enough. What is the rising and falling time for your signal?

RE: what's timing requirement of GPIOE detect rising/fall edge?

wen jin zhang — Sun, 17 May 2015 23:57:20 GMT

Thanks! But why the NRF_GPIOTE->CONFIG[] did not take over the NRF_GPIO->PIN_CNF[] configuration? the document said: When an OUT[n] task or an IN[n] event has been configured to operate on a pin, the pin can only be written from the GPIOTE module. Attempting to write a pin as a normal GPIO pin will have no effect. As long as an OUT[n] task or an IN[n] event is configured to control a pin n, the pin's output value will only be updated by the GPIOTE module. The pin's output value as specified in the GPIO will therefore be ignored as long as the pin is controlled by GPIOTE.

RE: what's timing requirement of GPIOE detect rising/fall edge?

Susheel Nuguru — Fri, 15 May 2015 09:38:13 GMT

There is nothing in the GPIO to generate events. When you have enabled the "Sense" mechanism on your input pin through the GPIO configuration, It will generate a detect signal which in turn will generate a PORT event inside GPIOTE.

This detection sampling should happen atleast at the speed of internal clock, so 0.06us. I am pretty confident that the chip won't miss it if it happens.