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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>nRF5340 QSPI operation with errata 171 workaround set to run at 96MHz seems to operate at 2.5MHz</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/70480/nrf5340-qspi-operation-with-errata-171-workaround-set-to-run-at-96mhz-seems-to-operate-at-2-5mhz</link><description>I have applied the errata 171 workaround to a zephyr code base with an MX25 chip and set the speed to 96MHz - when I run the application (engineering D silicon) with a scope on the QSPI clock line, I see a 2.5MHz clock. If I then change to 48MHz operation</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Fri, 15 Jan 2021 08:43:57 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/70480/nrf5340-qspi-operation-with-errata-171-workaround-set-to-run-at-96mhz-seems-to-operate-at-2-5mhz" /><item><title>RE: nRF5340 QSPI operation with errata 171 workaround set to run at 96MHz seems to operate at 2.5MHz</title><link>https://devzone.nordicsemi.com/thread/289351?ContentTypeID=1</link><pubDate>Fri, 15 Jan 2021 08:43:57 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:3d172ddc-ba5f-4557-93c2-4f23457c9935</guid><dc:creator>jm_laird</dc:creator><description>&lt;p&gt;Seems that it is working, the logic analyser which was being used must not have been up to good enough a spec to capture the data, after using a different logic analyser, the clock line is correctly triggering at the right speed&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>