<?xml version="1.0" encoding="UTF-8" ?>
<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>ERASEPROTECT Write and rewrite</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/70934/eraseprotect-write-and-rewrite</link><description>Hello, 
 I am using anrf9160 chip. I have a question about the ERASEPROTECT register. I would like to write it using the firmware to disable the ERASEALL functionality. 
 I am not sure to understand how to recover the device when this flag is set. https</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Tue, 26 Jan 2021 12:59:02 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/70934/eraseprotect-write-and-rewrite" /><item><title>RE: ERASEPROTECT Write and rewrite</title><link>https://devzone.nordicsemi.com/thread/291268?ContentTypeID=1</link><pubDate>Tue, 26 Jan 2021 12:59:02 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:000f9b2b-1e0e-47bc-a6cd-bf87e5bf2927</guid><dc:creator>H&amp;#229;kon Alseth</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
[quote user=""]&lt;p&gt;And I would like to add:&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;&lt;div style="overflow:auto;"&gt;&lt;div&gt;&lt;a href="#"&gt;Fullscreen&lt;/a&gt;&lt;div style="width:100%;height:12px;"&gt;&lt;div&gt;&lt;div style="margin-top:0;height:36px;width:39px;"&gt;&lt;div style="height:12px;"&gt;1&lt;/div&gt;&lt;/div&gt;&lt;div style="display:none;"&gt;&lt;/div&gt;&lt;/div&gt;&lt;div style="left:39px;right:0;bottom:0;"&gt;&lt;div style="margin-top:0;width:889px;height:36px;margin-left:0;"&gt;&lt;div&gt;&lt;div style="left:484px;"&gt;&lt;/div&gt;&lt;/div&gt;&lt;div&gt;&lt;/div&gt;&lt;div style="padding:0 4px;"&gt;&lt;div style="height:12px;"&gt;NRF_UICR-&amp;gt;ERASEPROTECT = 0x00000000;&lt;/div&gt;&lt;/div&gt;&lt;div&gt;&lt;/div&gt;&lt;div&gt;&lt;div style="left:4px;top:0;width:6px;height:12px;"&gt;&lt;/div&gt;&lt;/div&gt;&lt;/div&gt;&lt;/div&gt;&lt;div style="display:none;width:15px;bottom:0;"&gt;&lt;div style="width:15px;height:12px;"&gt;&lt;/div&gt;&lt;/div&gt;&lt;div style="display:none;height:15px;left:39px;right:0;"&gt;&lt;div style="height:15px;width:889px;"&gt;&lt;/div&gt;&lt;/div&gt;&lt;div style="height:auto;width:auto;top:0;left:0;white-space:pre;overflow:hidden;"&gt;&lt;div style="height:auto;width:auto;top:0;left:0;white-space:pre;overflow:visible;"&gt;&lt;/div&gt;&lt;div style="height:auto;width:auto;top:0;left:0;white-space:pre;font-style:inherit;font-size:inherit;line-height:inherit;font-family:inherit;overflow:visible;"&gt;XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX&lt;/div&gt;&lt;/div&gt;&lt;/div&gt;&lt;/div&gt;&lt;pre style="display:none;"&gt;NRF_UICR-&amp;gt;ERASEPROTECT = 0x00000000;

&lt;/pre&gt;&lt;/div&gt;&lt;p&gt;&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;However, I want to be sure that I can recover my device in this case. I was planning to add a function that reset the ERASEPROTECT register to 0xffffffff and that can be set through an UART command.&lt;/p&gt;
&lt;p&gt;- Would that work?&lt;/p&gt;[/quote]
&lt;p&gt;Enabling the protection through uart (or any other trigger) can work, but note that UICR is a special region.&lt;/p&gt;
&lt;p&gt;ERASEPROTECT is a part of UICR, and cannot be erased from the CPU, as per the PS:&lt;/p&gt;
&lt;p&gt;&lt;a href="https://infocenter.nordicsemi.com/topic/ps_nrf9160/nvmc.html?cp=2_0_0_3_3_1#concept_erase_page_code_memory"&gt;https://infocenter.nordicsemi.com/topic/ps_nrf9160/nvmc.html?cp=2_0_0_3_3_1#concept_erase_page_code_memory&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;You can read here on how to disable ERASEPROTECT (and perform&amp;nbsp;an unlocking operation):&lt;/p&gt;
&lt;p&gt;&lt;a href="https://infocenter.nordicsemi.com/topic/ps_nrf9160/chapters/dif/ctrl-ap.html?cp=2_0_0_8_1_3#ctrlap_unlocking"&gt;https://infocenter.nordicsemi.com/topic/ps_nrf9160/chapters/dif/ctrl-ap.html?cp=2_0_0_8_1_3#ctrlap_unlocking&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
[quote user=""]The second question I have is on the&amp;nbsp;&lt;span&gt;CTRL_AP_PERI_S.LOCK register. If I write it in the firmware, the only way to recover the device is by doing an erase ALL. But in this case the debugger and the firmware must have the same key&amp;nbsp; in the ERASEALL.DISABLE.KEY field. I was planning to use the JLink commander and use the following:&lt;/span&gt;[/quote]
&lt;p&gt;&amp;nbsp;If you lock down the device using ERASEPROTECT, the way to recover is that the debugger and CPU writes the same key into the&amp;nbsp;&lt;a href="https://infocenter.nordicsemi.com/topic/ps_nrf9160/chapters/dif/ctrl-ap.html?cp=2_0_0_8_1_3#register.ERASEPROTECT.DISABLE"&gt;ERASEPROTECT.DISABLE&lt;/a&gt; register.&lt;/p&gt;
&lt;p&gt;There is also a added security seen from the CPU side wrt. this locking:&lt;/p&gt;
&lt;p&gt;The CPU can only write into&amp;nbsp;the ERASEPROTECT.DISABLE&amp;nbsp;register if register &lt;a href="https://infocenter.nordicsemi.com/topic/ps_nrf9160/chapters/dif/ctrl-ap.html?cp=2_0_0_8_1_5_4#register.ERASEPROTECT.LOCK"&gt;ERASEPROTECT.LOCK&lt;/a&gt;&amp;nbsp;is in a writeable state.&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;The locking mechanism is to avoid brute-force attack from the debugger.&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
[quote user=""]&lt;p&gt;Assuming that&amp;nbsp;0xDEADBEEF is also in the&amp;nbsp;&lt;span&gt;CTRL_AP_PERI_S.DISABLE (NRF_CTRL_AP_PERI_S-&amp;gt;ERASEPROTECT.DISABLE in the code) register of the device.&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;With that procedure, will the device be erased? I want to be sure that the SWD command will still work as APPROTECT is on..&lt;/span&gt;&lt;/p&gt;[/quote]
&lt;p&gt;&amp;nbsp;Yes, if the CPU and the debugger has both written the same key, in this case 0xDEADBEEF, to its respective register; then it shall unlock and erase the nRF9160.&lt;/p&gt;
&lt;p&gt;Process will look similar to this:&lt;/p&gt;
&lt;p&gt;* Your fw writes non-zero key to ERASEPROTECT.DISABLE&lt;/p&gt;
&lt;p&gt;* Your debugger writes the same non-zero key using SWDWriteDP to the similar exposted register over the debug interface&lt;/p&gt;
&lt;p&gt;* Wait for the ERASEALL operation to finish (see&amp;nbsp;&lt;a href="https://infocenter.nordicsemi.com/topic/ps_nrf9160/nvmc.html?cp=2_0_0_3_3_8#unique_274245573"&gt;&lt;span&gt;t&lt;/span&gt;&lt;/a&gt;&lt;sub&gt;&lt;a href="https://infocenter.nordicsemi.com/topic/ps_nrf9160/nvmc.html?cp=2_0_0_3_3_8#unique_274245573"&gt;ERASEALL&lt;/a&gt;)&lt;/sub&gt;&lt;/p&gt;
&lt;p&gt;* Do a pin-reset (or power cycle)&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Note that ERASEPROTECT and APPROTECT are two different locking mechanisms. You can enable ERASEPROTECT without setting APPROTECT, thus the debugger can write into the CPU mapped register for debugging/testing purposes:&lt;/p&gt;
&lt;p&gt;&lt;a href="https://infocenter.nordicsemi.com/topic/ps_nrf9160/chapters/dif/ctrl-ap.html?cp=2_0_0_8_1_1#ctrlap_erase"&gt;https://infocenter.nordicsemi.com/topic/ps_nrf9160/chapters/dif/ctrl-ap.html?cp=2_0_0_8_1_1#ctrlap_erase&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Kind regards,&lt;/p&gt;
&lt;p&gt;Håkon&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>