Reducing current peaks

RE: Reducing current peaks

hmolesworth — Wed, 31 May 2023 21:10:46 GMT

No, the 47uF was just the example; minimum in our experience is 3 x 47uF so 220uF is a good choice. Note good practice is to isolate the drain from the battery by the nRF52 from other significant current drains where possible. A schottky diode works but wastes power; a better choice is an ideal diode such as the max40203

The nRF52 has a 150uF separated from the battery by an always-enabled ideal diode; other loads connect to the battery with further capacitance and periodically pulse the battery voltage low for brief periods but the nRF52 is isolated from this drop in voltage and thus avoids brownouts or resets. Analogue circuits such as an AFE may be isolated from voltage pulses on their supply in a similar manner.

RE: Reducing current peaks

A.P — Mon, 29 May 2023 12:00:55 GMT

Hi!
We didn't apply any other filtering to the device.

The peaks are not entirely gone, but they have been 'flattened down', which is the improvement we were looking for. These peaks are caused by the RTC and so are acceptable current draws. This power mode allows our units to 'wake up' from an external interrupt, which is what we'd like them to do.

Asaf

RE: Reducing current peaks

Michael111 — Mon, 22 May 2023 05:40:52 GMT

Hello,
thanks for your reply.
Did you apply any more filtering to your device than the two 47uF capacitors?
Did you get rid of this current peaks at any point?
Best regards,
Michael

RE: Reducing current peaks

A.P — Thu, 18 May 2023 14:21:32 GMT

Hi!

I can not recommend anything to you I'm afraid, as this is not my area of expertise.

I believe we chose a 47 uF, 6 volt capacitor as our solution to flatten these peaks, as it suited our needs well enough. We had considered the expected conditions our product is targeted to work at (working voltage, temperature, current peak draw, maximum expected battery life etc) and concluded the overhead price and/or space for a larger capacitor is not worth it.

Hope this helps

RE: Reducing current peaks

Michael111 — Wed, 17 May 2023 07:08:55 GMT

Hi,
we are currently using a 220 µF MLCC in parallel, which is rated for 6.3 V. It looks like that there is no buffering effect.
Do you really recommend only an 47 µF capacitor?

RE: Reducing current peaks

hmolesworth — Wed, 03 Mar 2021 17:34:50 GMT

The PPK2 is much better, worth the cost. The bottom line on capacitors is that for ceramic types of the values you have in mind (say 47uF) at 6 volt operation a 47uF capacitor is only actually (47/2) = approx 24uF. At 3 volts a 6.3 volt capacitor is ok with more or less the 47uF actual capacitance as 3 volts is less than half of the capacitor rated voltage. However I would urge caution, and at 3 volts or 3.3 volts operation use a 10 volt capacitor (my 3x rule-of-thumb). At 10 volt rating and 3.3 volt operation, 47uF really is 47uF.

Tantalum capacitors, on the other hand, do not have this issue; however Tantalum capacitors have increased leakage, maybe as much as 3uA, and can catch fire if fitted backwards.

RE: Reducing current peaks

A.P — Wed, 03 Mar 2021 09:15:49 GMT

Hi hmolesworth!

Thank you for the answers!
I'm using the PPK, not PPK2. I'll consider acquiring a PPK2 as well.

As far as the capacitance reduction due to DC bias, It seems I was misunderstanding a crucial point. I thought the voltage rating of a capacitor meant minimal DC bias loss while working within the given voltage rating, and that the DC bias loss becomes substantial only when approaching the rated voltage.

Your link

[quote userid="65515" url="~/f/nordic-q-a/72251/reducing-current-peaks/297295#297295"]See for example murata faqs[/quote]

suggest otherwise, if I understood correctly. The bias, even at ~3V is roughly -20%, and at ~5V is roughly -40%. So the capacitance given for the capacitor is accurate only for 0V DC, and must be considered lower at any other DC voltage, even if the capacitor is rated for work in high voltages.
Is my summary fair?

Thank you for pointing that out!

One last question, if my input will be no more than the 3.3V from a coin cell, why would I want the capacitors rated for 6.3V, or 10V, as you mentioned here?

[quote userid="65515" url="~/f/nordic-q-a/72251/reducing-current-peaks/297295#297295"]I use 3x47uF on CR2032, not less than 6.3 volt but preferably 10 volt[/quote]

RE: Reducing current peaks

hmolesworth — Tue, 02 Mar 2021 17:19:55 GMT

Item 1: I use 3x47uF on CR2032, not less than 6.3 volt but preferably 10 volt

Item 2: PPK2 is better than PPK; not sure which you are using

Item 3: The DC voltage applied to a ceramic capacitor causing a reduction in capacitance is well known, maybe see this FAQ link which shows a typical 50% reduction in capacitance using a 6.3volt rated capacitor at 6.3 volts; that requires a 2x increase in rated voltage for a given capacitance value or double the number of expected components fitted. My rule-of-thumb is 3x. See for example murata faqs

TI also have a good white paper, though older: swra349.pdf (also swra347a.pdf and spreadsheet, not sure if any use swra347)

RE: Reducing current peaks

Ashley Adamson — Tue, 02 Mar 2021 17:09:57 GMT

Not a technical reply more about language. Interested to see that you refer to a CR2032 as a coin cell battery. I have always referred to that type of battery as "button batteries". Good luck with the capacitor use.