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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>I2C communication by NFC1/P0.09 as SCL and NFC2/P0.10 as SDA</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/72421/i2c-communication-by-nfc1-p0-09-as-scl-and-nfc2-p0-10-as-sda</link><description>I am using nRF52832. 
 Can I use NFC1/P0.09 as SCL and NFC2/P0.10 as SDA? 
 nRF52832_PS_v1.4.pdf states &amp;quot;The pin capacitance will be higher on these pins&amp;quot; in 4.3.2. 
 I am concerned if I2C communication does not work because NFC1/P0.09 and NFC2/P0.10</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Mon, 08 Mar 2021 13:38:22 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/72421/i2c-communication-by-nfc1-p0-09-as-scl-and-nfc2-p0-10-as-sda" /><item><title>RE: I2C communication by NFC1/P0.09 as SCL and NFC2/P0.10 as SDA</title><link>https://devzone.nordicsemi.com/thread/298397?ContentTypeID=1</link><pubDate>Mon, 08 Mar 2021 13:38:22 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:3dd8180a-5e0c-47bc-9aa7-af5a194d495a</guid><dc:creator>Sugiyama_DME_2</dc:creator><description>&lt;p&gt;Hi, Jorgen,&lt;/p&gt;
&lt;p&gt;Thank you for your reply.&lt;/p&gt;
&lt;p&gt;I need to use&amp;nbsp;NFC1/P0.09 as SCL and NFC2/P0.10 as SDA because other GPIO pins are assigned for other functions.&lt;/p&gt;
&lt;p&gt;I will check I2C communication by &lt;span&gt;using NFC1/P0.09 as SCL and NFC2/P0.10 as SDA&amp;nbsp;&lt;/span&gt;with the evaluation board.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Best regards,&lt;/p&gt;
&lt;p&gt;Yasuyuki&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: I2C communication by NFC1/P0.09 as SCL and NFC2/P0.10 as SDA</title><link>https://devzone.nordicsemi.com/thread/298328?ContentTypeID=1</link><pubDate>Mon, 08 Mar 2021 10:54:10 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:a48aed75-3a06-454f-9c23-1b3e4702aaf5</guid><dc:creator>J&amp;#248;rgen Holmefjord</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;According to the&amp;nbsp;&lt;a title="  GPIO Electrical Specification  " href="https://infocenter.nordicsemi.com/topic/com.nordic.infocenter.nrf52832.ps.v1.1/gpio.html?cp=4_2_0_19_3_0#unique_1511470077"&gt;GPIO Electrical Specification&lt;/a&gt;, the capacitance on NFC pads are typical 4 pF vs 3 pF on normal pads:&lt;/p&gt;
&lt;p&gt;&lt;img alt=" " src="https://devzone.nordicsemi.com/resized-image/__size/800x100/__key/communityserver-discussions-components-files/4/GPIO_5F00_cap.png" /&gt;&lt;/p&gt;
&lt;p&gt;I do not think this should have a big impact on the I2C bus. The &lt;a href="https://www.nxp.com/docs/en/user-guide/UM10204.pdf#page=36"&gt;I2C specifications&lt;/a&gt; say this:&lt;/p&gt;
&lt;p&gt;&lt;em&gt;&amp;quot;The external pull-up devices connected to the bus lines must be adapted to accommodate the shorter maximum permissible rise time for the Fast-mode I2C-bus. For bus loads up to 200 pF, the pull-up device for each bus line can be a resistor; for bus loads between 200 pF and 400 pF, the pull-up device can be a current source (3 mA max.) or a switched resistor circuit&amp;quot;.&lt;/em&gt;&lt;/p&gt;
&lt;p&gt;Best regards,&lt;br /&gt;Jørgen&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>